Panasonic CQ-C1323NW, Руководство по обслуживанию

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Re
f.
No
.
Part No. Part Name &
Description I/O(V) FM(
V)
AM(V
)
CD(V
)
98 EO1 PLL phase comparison
error output
O 1.9
3 2.02 0
99 TEST1 GND connection I 0 0 0
10
0 XOUT 4. 5 MHz X’tal and
Connection
O 2.6
2 2.63 2.63
Note 1 :
Voltage measuerments are with respect to ground, with a
voltmeter (internal resistance : 10M ohms).
IC501:YEAMLC78691
Ref.
No.
Part No. Part Name & Description I/O (V)
1 EFMIN RF signal input port. I 1.58
2 RFOUT RF signal output port. O 1.67
3 LPF LPF capacitor connection port
for RF signal DC level
detection.
O 1.64
4 PHLPF LPF capacitor connection port
for detection.
O 1.68
5 AIN A signal input port. I 1.66
6 CIN C signal input port. I 1.66
7 BIN B signal input port. I 1.66
8 DIN D signal input port. I 1.66
9 FEC LPF capacitor connection port
for FE signal.
O 1.6
10 RFMON LSI build-in analog signal
monitor port.
O 1.64
11 VREF VREF voltage output port. O 1.66
12 JITTC Capacitor connection port for
JIT detection.
O 0
13 EIN E signal input port. I 1.65
14 FIN F signal input port. I 1.66
15 TEC LPF capacitor connection port
for TE signal.
O 1.57
16 TE TE signal output port. O 1.57
17 TEIN TE signal input port for TES. I 1.65
18 LDD Laser power control output
port.
O 3.27
19 LDS Laser power detection input
port.
I 0
20 AVSS GND for analog. _ 0
21 AVDD VDD for analog. _ 3.27
22 FDO Focus control signal output
port. D/A output.
O 1.65
23 TDO Tracking control signal output
port. D/A output. O 1.65
24 SLDO Thread control signal output
port. D/A output.
O 1.64
25 SPDO Spindle control signal output
port. D/A output.
O 1.64
26 VVSS1 GND for build-in VCO. _ 0
27 PDOUT1 Phase comparison output port1
for build-in VCO control.
O 0
28 PDOUT0 Phase comparison output port0
for build-in VCO control.
O 0
29 PCKIST PDOUT0 1 output port for
current setting.
I 1.07
30 VVDD1 VDD for VCO. _ 3.29
31 DMUTEB DMUTEB (general) output port. O 0
32 PUIN PUIN (general) I/O port. (With
built-in
Pull-Up resistance.
Turning off when reset)
I/O 0
33 DETECT Detection signal output port. O 0
34 FSEQ Synchronous signal output
port. It becomes ¡§H” when
Synchronous Idle detected from
O 0
the EFM signal is
corresponding to Synchronous
Idle of internal generation.
35 C2F C2 error signal output port. O 0
36 DVDD VDD for Digital. _ 3.29
37 DVSS GND forDigital. _ 0
Ref.
No.
Part No. Part Name & Description I/O (V)
38 DVDD18 VDD capacitor connection port
for digital circuit.
O 1.83
39 MONI0 Monitor port0. O 0
40 MONI1 Monitor port1. O 0
41 DVDD VDD for Digital. _ 3.25
42 DVSS GND forDigital. _ 0
43 CE Host IF: Communication enable
signal input port.
I 0
44 CL Host IF: Data transfer clock
input port.
I 3.56
45 DI Host IF: Data input port. I 0
46 DO Host IF: Data output port (Nch
output) Pull-Up is necessary. O 5.32
47 RESB Reset input port. Make it L”
when power ON.
I 0
48 INTB Interrupt signal output port.
(Servo)
O 3.25
49 SUB_READY0 For host u-com IF: SUB-RDY
output. (Nch and Pull-Up
resistance is necessary)
O 0
50 CD_MUTEO General I/O port2. (With
built-in Pull-Up resistance.
Turning off when reset)
I/O 5.31
51 LOW_BATI General I/O port1 I/O 5.16
52 CONT General I/O port0 I/O 0
53 OSCCNT OSCOFF control port .
Connected with 0V when Reset.
I 0
54 STREQ Stream data demand signal
output port.
I/O 0
55 STCK Clock input port for stream
data.
I/O 0
56 STDATA Stream data input port. I/O 0
57 TEST1 Inputport for test. Needed
connect with 0V1
I 0
58 DATA Lch/Rch data output port. O 0
59 DATACK Clock output port. O 0
60 LRSY Lch/Rch clock output port O 0
61 VVDD2 VDD for build-in VCO. _ 3.25
62 VPREF2 Built-in VCO oscillation
cooking stove setting input
terminal.
I 3.25
63 VCOC2 Built-in VCO control voltage
setting input port.
I 1.08
64 VPDOUT2 Output port for built-in VCO
control.
O 0.08
65 VVSS2 GNDfor building VCO. Needed
connect with 0V.
_ 0
66 DVDD18 VDD capacitor connection port
for digital circuit.
O 1.84
67 DVSS GND for Digital system. Needed
connect with 0V. _ 0
68 DVDD VDD for Digital system. _ 3.25
69 DOUT Digital OUT output port. EIAJ
format. O 0
70 AMUTEB AMUTEB (general) output port. O 0
71 XVSS GND for oscillation circuit.
Needed connect with 0V.
_ 0
72 XOUT Connected of 16.9344MHz
oscillation.
O 1.39
73 XIN Connected of 16.9345MHz
oscillation.
I 1.35
74 XVDD VDD forOscillation circuit. _ 3.19
75 LCHO L channel output port. O 0
76 LRVDD VDD for LR channel. _ 3.21
77 LRVSS GND for LR channel. Needed
connect with 0V.
_ 0
78 RCHO R channel output port. O 0
79 AVDD VDD for analog . _ 3.27
80 SLCO Slice level control output
port.
O 1.6
7
CQ-C1323NW