OSS OSS-PCIe-HIB25-x4, Руководство по установке

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One Stop Systems
OSS-PCIe-HIB25x4 | 12
1.10
PCI Express x4 Card Edge Connector Pin Outs

The pins are numbered as shown with side A on the top of the centerline on the solder side of the board and side B on the bottom of
the centerline on the component side of the board.

The PCIe interface pins PETpx, PETnx, PERpx, and PERnx are named with the following convention: “PE” stands for PCIe high speed,
“T” for Transmitter, “R” for Receiver, “p” for positive (+), and “n” for negative (-).

The adjacent differential pairs are separated by two ground pins to manage the connector crosstalk.
Pin
#
Side B Side A
Name Description Name Description
1 N/C N/C PRSNT1# Hot-Plug presence detect
2 N/C N/C N/C N/C
3 N/C N/C N/C N/C
4 GND Ground GND Ground
5 NC N/C N/C Not connected
6 N/C N/C JTAG3 Host Mode:TDI (Test Data Input)
Target Mode: Test Clock+
7 GND Ground JTAG4 Host Mode: TDO (Test DataOutput)
Target Mode: Test Clock-
8 +3.3V 3.3 V power N/C Not connected
9 N/C Host Mode: Not connected N/C Not connected
Target Mode: Test Power On
10 3.3Vaux 3.3 V auxiliary power +3.3V 3.3 V power
11 N/C N/C PERST# Fundamental reset
Mechanical key
12 RSVD Reserved GND Ground
13 GND Ground Reference clock (differential pair)
14 PETp0 Transmitter differential pair, Lane 0 REFCLK
15 PETn0 GND Ground
16 GND Ground PERp0 Receiver differential pair, Lane 0
17 PRSNT2# Hot-Plug presence detect PERn0
18 GND Ground GND Ground
19 PETp1 Transmitter differential pair, Lane 1 RSVD Reserved
20 PETn1 GND Ground
21 GND Ground PERp1 Receiver differential pair, Lane 1
22 GND Ground PERn1
23 PETp2 Transmitter differential pair, Lane 2 GND Ground
24 PETn2 GND Ground
25 GND Ground PERp2 Receiver differential pair, Lane 2
26 GND Ground PERn2
27 PETp3 Transmitter differential pair, Lane 3 GND Ground
28 PETn3 GND Ground
29 GND Ground PERp3 Receiver differential pair, Lane 3
30 RSVD Reserved PERn3
31 PRSNT2# Hot-Plug presence detect GND Ground
32 GND Ground RSVD Reserved