Onkyo TX-SR403, Руководство по обслуживанию

Страница: 65 / 149

TX-SR403/8340
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-7
Q201: CS494003CQZ (Multi-Standard Audio Decoder)-7/11
SDATAN1, GPIO25 --- PCM Audio Input Data, General purpose I/O
Digital-audio PCM data input. This can act as a general-purpose input or output that can
be individually configured and controlled by DSPC. BIDIRECTIONAL - Default: INPUT
SDATAN2, GPIO26 --- PCM Audio Input Data, General purpose I/O
Digital-audio PCM data input. This can act as a general-purpose input or output that can
be individually configured and controlled by DSPC. BIDIRECTIONAL - Default: INPUT
SDATAN3, GPIO27 --- PCM Audio Input Data, General purpose I/O
Digital-audio PCM data input. This can act as a general-purpose input or output that can
be individually configured and controlled by DSPC. BIDIRECTIONAL - Default: INPUT
SCS --- Host Serial SPI Chip Select
SPI mode active-low chip-select input signal. INPUT
SCCLK --- Serial Control Port Clock
This pin serves as the serial SPI clock input. INPUT
SCDIN --- SPI Serial Control Data Input
In SPI mode this pin serves as the data input pin. INPUT
SCDOUT, SCDIO --- Serial Control Port Data Input and Output
In SPI mode this pin serves as the data output pin. BIDIRECTIONAL - Default: OUTPUT in
SPI mode.
INTREQ --- Control Port Interrupt Request
Open-drain interrupt-request output. This pin is driven low to indicate that DSPC has outgoing
control data and should be serviced by the host.
OPEN DRAIN I/O - Requires 3.3k Ohm Pull-Up
HDATA7, GPIO7 --- DSPC Bidirectional Data Bus, General Purpose I/O
HDATA6, GPIO6
HDATA5, GPIO5
HDATA4, GPIO4
HDATA3, GPIO3
HDATA2, GPIO2
HDATA1, GPIO1