ON Semiconductor RSL10 SIP, Руководство пользователя

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EVBUM2565/D
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8
APPENDIX B − SCHEMATICS
This appendix contains schematics for the Evaluation and Development Board, version 1.3:
•
The Top-level (Arduino interface) schematic
•
The RSL10 SIP schematic
•
The Interface MCU schematic
•
The Power Supply schematic
Figure 7. Top-Level (Arduino Interface) Schematic
GND
AD0
1
AD1
2
AD2
3
AD3
4
AD4
5
AD5
6
AD1
VIN
8
GND
7
GND
6
5V
5
3V3
4
RESET
3
IOREF
2 1
POWER1
IO8
1
IO9
2
IO10
3
IO1
1
4
IO12
5
IO13
6
GND
7
AREF
8
SDA
9
SCL
10
IOH1 IOH
IO0
1
IO2
3
IO3
4
IO4
5
IO5
6
IO6
7
IO7
8
IO1
2
IOL1 IOL
DIO[15
..0]
JTAG_TMS
JTAG_TCK
RESET
TRSTin
TDIin
TDOin
U_RSL10
RSL10
.SchDoc
GND
TRSTin
TDIin
TMSin
TCKin
TRESin
TDOin
DIO4 DIO5
U_Interface MCU Interface
MCU
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DIO0 DIO1 DIO2 DIO3
DIO6
DIO[15
..0]
DIO13 DIO14 DIO15 DIO10 DIO1
1
DIO12
U_Power
Power
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VDDO
5V
VIN3.3V
2 1
3 4
5 6
P1 2x3 Pin H
eader
DIO4 DIO5 DIO8 DIO7
GND SPI_CLK1 SPI_DA
TAI1
SPI_DA
TAO1
SPI1_
C
S1
SWO/DIO1
1
AREF I2C_SDA1 I2C_SCK1 SWDIO/DIO13 SWDCLK/DIO12 SPI_DA
TAI2/DIO16
INT2 SPI_CLK2/DIO14 PWM1 INT0 UAR
T1_TX
UAR
T1_RX
J7
−
BB
J8
−
BB
J20
−
BB
VCOM 3V3_KNX RESET IOREF IOREF 5V GND GND J21
−
BB
A0 A1 A2 A3
I2C_EXP_G
PIO12
I2C_EXP_G
PIO13
DIO9
RESET
JTAG_TCK
JTAG_TMS
TDOin
TDIin
TRSTin
TMSin
TCKin
TRESin
GND
4 3
6 5
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