ON Semiconductor NCV51705, Руководство пользователя

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TESTING WITHOUT INSTALLING INTO A PCB
The NCP51705, SiC Driver Mini EVB can also be tested
without installing into a main PCB. However, since this
EVB was designed for small form factor there are no test
points included for connecting voltage probes. The EVB
should be hand probed carefully since the components are
very fine pitch or flying leads connected to desired probe
points can be attached. Note that the IN+/IN
− PWM
amplitude must be equal to the XVDD (5 V). The 20 V DC
bias (VDD and GND) is on the secondary side of the digital
isolator and therefore has a separate/isolated return ground
from the 5 V DC bias (XVDD and XGND). The
recommended series load of 470 pF and 4.99
W is close to
what might be representative of a SiC gate drive input
impedance. Leaded passive components can be soldered
into the T0
− 247 holes as shown in Figure 15 . Alternatively,
a T0 − 247 SiC MOSFET can also be soldered in place for Q1
and used as a load for the NCP51705. Note that testing
without installing into a power stage, leaves the DESAT pin
open since there is no active drain signal. The effect of
operating DESAT this way is explained in section ‘DESAT’
.
Figure 15. Test Configuration of EVB without Installing into Main PCB
5V DC
20V DC
470pF
4.99 W
AFG 5V
PK
,
150kHz, 50%
Turn − on Procedure
1. Apply XVDD = 5 V (Voltage for primary side of
the digital isolator, U2)
2. Apply VDD = 20 V (VDD bias voltage for the
NCP5170, SiC driver, Note: UVLO
ON
= 17 V)
3. Apply IN+=5V
PK
, 150 kHz, 50% (Reducing the
frequency to less than ~90 kHz will show DESAT
active as described in section ‘DESAT’)
VEE
The EVB is preconfigured for VEE=0V. Operating the
EVB this way will result in switching between
0V < OUT < VDD. Several other options for negative VEE
configuration are easily set by removing/installing resistors
according to Table 3
.
Note that R10 must be removed for any
VEE configuration other than 0 V. VDD
UVLO
is
programmable by the UVSET resistor as described in
section ‘UVSET’ but VEE
UVLO
is fixed at 80% of the VEE
regulate value. If desired, the NCP5170 internal VEE charge
pump can be disabled and an external negative voltage can
be applied to VEE. When providing VEE from an external
negative voltage supply, it is recommended to apply VEE
prior to VDD. Any time the internal VEE charge pump is
disabled (VEESET = 0 V), VEE
UVLO
is disabled and is
therefore shown as “NA” in Table 3 .
Table 3. VEESET CONFIGURATION OPTIONS
VEESET COMMENT VEE VEE
UVLO
VDD
Install R7 = 0 W , Remove R8, R9, R10 9V < VEESET < VDD
− 8 V − 6.4 V
V5V Install R7 = 0 W , Remove R7, R9, R10 − 5 V − 4 V
OPEN Remove R7, R8, R9, R10 − 3 V − 2.4 V
GND Install R9 = R10 = 0 W , Remove R7, R8 0 V NA
GND Remove R7, R8, R9, R10. Apply negative external voltage within the range of − 8V < V
EXT
< 0V − V
EXT
NA