ECLTSSOP20EVB
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7
Figure 7. Configuration 2
NORMAL TOP VIEW
EP17 / LVEP17
PIN 1
EXPANDED BOTTOM VIEW
EP17 / LVEP17
WIRE
J9
J7
J6
J5
J4
J2
J19
J13
J12
J14
J16
J17
SMA
CONNECTORS
BANANA JACK
PLUG
J3
J8
0603 CHIP
CAPACITOR
0.1
m
F
J15
J18
V
CC
V
EE
0603 CHIP
CAPACITOR
0.01
m
F
0805 CHIP
CAPACITOR
0.01
m
F
0402 CHIP
RESISTOR
50
W
Table 4. Configuration 2 (Device EP17 and LVEP17)
Device
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10 J11
J12 J13 J14 J15 J16 J17 J18 J19 J20
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Connector
No
Yes Yes Yes Yes Yes Yes Yes Yes Yes
No
Yes Yes Yes Yes Yes Yes Yes Yes
No
Resistor
No
Yes Yes Yes Yes Yes Yes Yes Yes
No
No
No
No
No
No
No
No
No
No
No
Power
V
CC
No
No
No
No
No
No
No
No
No
V
EE
No
No
No
No
No
No
No
No
V
CC