ECLTSSOP20EVB
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10
Figure 10. Configuration 5
NORMAL TOP VIEW
EP56 / LVEP56
PIN 1
EXPANDED BOTTOM VIEW
EP56 / LVEP56
WIRE
V
CC
V
EE
0603 CHIP
CAPACITOR
0.01
m
F
0805 CHIP
CAPACITOR
0.01
m
F
0402 CHIP
RESISTOR
50
W
J9
J7
J6
J5
J4
J2
J19
J13
J12
J16
J17
SMA
CONNECTORS
BANANA JACK
PLUG
0603 CHIP
CAPACITOR
0.1
m
F
J15
J18
J1
J10
Table 7. Configuration 5 (Device EP56 and LVEP56)
Device
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10 J11
J12 J13 J14
J15 J16 J17 J18 J19 J20
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Connector
Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes
No
Yes Yes
No
Yes Yes Yes Yes Yes
No
Resistor
Yes Yes
No
Yes Yes Yes Yes
No
Yes Yes
No
No
No
No
Yes Yes Yes
No
No
No
Power
No
No
No
No
No
No
No
No
No
No
V
EE
No
No
V
CC
No
No
No
No
No
V
CC