ON Semiconductor AP0100CSSL00SPGAH-GEVB Скачать руководство пользователя страница 2

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AP0100CSSL00SPGAH−GEVB

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Top View

Figure 3. Top View of the Board with Default Jumpers

Headboard Connector J8

Headboard Connector J7

GPIO_DATA16 P37, P40, P41, P42

STANDBY P6

VDD P26

RESET Switch SW7

GPIO1_LED P17

Video Filter Sel P56, P57, P58

OSC/XTAL Sel P22, P23

MCLK_IN P16

SEN_RST_OUT P51

1OE/2OE P54

ON_LED P11

TRST_BAR P3

SPI Mem. Sel P7

SPI_SDI_BAR P5

SPI_SCLK/CS_N P44

SEN_DATA P31

SEN_CLK P30

EEPROM Sel P47, P48, P59

Bottom View

Figure 4. Bottom View of the Board

Baseboard Connector J5

Baseboard Connector J6

+VCC P14

+SVDDIO P10

+2V8_VDDPHY P20

+HVDDIO P12

+AVDD P9

+3V3_VDDADAC P21

HiSPi Connector J2

HiSPi Connector J1

Содержание AP0100CSSL00SPGAH-GEVB

Страница 1: ...ucts This headboard is intended to plug directly into the Demo 2X system Test points and jumpers on the board provide access to the clock I Os and other miscellaneous signals Features Clock Input Default 27 MHz Crystal Oscillator Optional Demo 2X Controlled MClk Two Wire Serial Interface Parallel Interface HiSPi High Speed Serial Pixel Interface ROHS Compliant Block Diagram Figure 2 Block Diagram ...

Страница 2: ...1_LED P17 Video Filter Sel P56 P57 P58 OSC XTAL Sel P22 P23 MCLK_IN P16 SEN_RST_OUT P51 1OE 2OE P54 ON_LED P11 TRST_BAR P3 SPI Mem Sel P7 SPI_SDI_BAR P5 SPI_SCLK CS_N P44 SEN_DATA P31 SEN_CLK P30 EEPROM Sel P47 P48 P59 Bottom View Figure 4 Bottom View of the Board Baseboard Connector J5 Baseboard Connector J6 VCC P14 SVDDIO P10 2V8_VDDPHY P20 HVDDIO P12 AVDD P9 3V3_VDDADAC P21 HiSPi Connector J2 H...

Страница 3: ... HEADERS Jumper Header No Jumper Header Name Pins Description P3 TRST_BAR Open OTPM Programming Voltage Not Supplied 2 3 Default Set to Normal Mode P4 SADDR Open Set to Test Mode Open Analog Test 1 Header P5 SPI_SDI_BAR 1 2 Default GND AP0100 in Host Mode Open SPI_SDI_SEL AP0100 in Flash Mode P6 STANDBY 2 3 Default Active Mode 1 2 Standby Mode Open I2C IO Expander Control P7 SPI Memory Selection 2...

Страница 4: ...o On Board 3V3_VDDADAC Power Supply 2 3 External Power Supply Connection P22 P23 Oscillator Xtal Selection P22 1 2 P23 Open Default Selects Oscillator as AP0100 Input Clock P22 2 3 P23 Closed Selects Crystal as AP0100 Input Clock P24 EXT_REG 1 2 Default Internal Regulator 2 3 External Regulator P26 VDD 1 2 Default Internal Regulator 1V2_VDD 2 3 External On Board Regulator U2 Set 1V2 P28 UART Trans...

Страница 5: ...ss to Sensor SPI P45 SPI_SDI Open Default Data or GND AP0100 in Flash Host Mode 1 2 High Z AP0100 in Auto Config Mode P47 P48 P59 Serial I2C EEPROM Address P47 Closed P48 Open P59 Open EEPROM Address Set to 0xAA Default P47 Closed P48 Open P59 Open EEPROM Address Set to 0xA2 P47 Open P48 Closed P59 Open EEPROM Address Set to 0xA6 P47 Open P48 Open P59 Open EEPROM Address Set to 0xAE P49 SEN_SCLK 2...

Страница 6: ...rights nor the rights of others SCILLC products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur Should Buyer purchase or use SCILLC pro...

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