H7BR
H7BR
5
Timing Charts
Gate
input
CP1
Count
input
CP2
Count
Reversible A (command inputs)
Reversible C (phase difference inputs)
A: Minimum signal width
B: Must be at least 1/2 of minimum signal width. Signals may not be counted if the minimums for A and B are not met.
Reversible B (individual inputs)
CP1
Count
CP1
CP2
Count
Count
input
CP1
Gate
input
CP2
Count
Count
Count
input
CP1
Count
Down
Count
■
INPUT MODES
Up
H
L
H
L
Gate
input
CP2
0
0
1
2
3
4
5
H
L
H
L
0
0
1
2
3
4
5
H
L
H
L
0
n
n-1
n-2
n-3
n-4
n-5
Count
input
CP2
Gate
input
CP1
H
L
H
L
0
n-5
n-4
n-3
n-2
n-1
n
A
A
H
L
CP2
H
L
0
3
2
1
2
1
2
3
H
L
H
L
0
1
2
3
2
1
1
2
3
H
L
H
L
0
3
2
1
2
1
2
3
Counting speeds of CP1 and CP2 must be the same for
Reversible C.
Signal
No-voltage input
Voltage input
H
Short circuit
4.5 to 30 VDC
L
Open circuit
0 to 2 VDC