Omron CVM1 Series, Руководство по эксплуатации

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Ladder Programming Precautions Section 3-4
3-4 Ladder Programming Precautions
When a SYSMAC C500/C1000H/C2000H system is replaced with a CVM1/
CV-series system, the PC Link’s LR Area and Status Flags are in a different
data area location. The different data area addresses must be used in ladder
programs.
3-4-1 LR Area
In C1000H/C2000H PLCs, the 64 words between LR 00 and LR 63 are used
as the LR Area, but in CVM1/CV-series PLCs, the LR Area is allocated in CIO
Area words CIO 1000 to CIO 1063 (the Data Link Area).
Check the level/link number setting, node address setting, and number of LR
bits setting to verify which words in the LR Area to use in the ladder program.
1. Check the level/link number set for the C500-LK009-V1 on the DIP Switch
(SW3) on the back of the C500-LK009-V1.
Set the same level/link number setting on the CVM1-LK401.
2. Check the node address set for the C500-LK009-V1 on the DIP Switch
(SW1) on the back of the C500-LK009-V1.
Set the same node address on the CVM1-LK401.
3. If the node address is set to 0 (polling node), the Number of LR Bits must
be set on the Unit. Check the Number of LR Bits set on the DIP Switch
(SW1) on the back of the C500-LK009-V1.
Set the same Number of LR Bits setting on the CVM1-LK401
Note If the node address of the C500-LK009-V1 being replaced is non-zero (polled
node), it’s Number of LR Bits setting is ignored so it may not have been set. To
confirm the polled node’s LR Area settings, it is necessary to check the Num-
ber of LR Bits setting in that PC Link’s polling node (node 0).
Setting Setting on back of
C500-LK009-V1
Setting on CVM1-LK401
Level/link number
( 3-3-4 Setting the
Level/Link Number )
Node address
( 3-3-2 Setting the
Node Address in the
PC Link
)
Number of LR bits
( 3-3-3 Setting the
Number of LR Bits
(Max. Number of PC
Link Units)
)
1 2 3 4
ON
Level/Link Number
Setting (Pins 3 and 4)
ON
1 2 3 4 5 6 7 8
ON
Level/Link Number
Setting (Pins 3 and 4)
1 2 3 4 5 6 7 8
ON
PC Link Node
Address (Pins 1 to 5)
ON
NODE
No.
×
10
1
×
10 0
0
0
1 2 3 4 5 6 7 8
ON
Number of LR Bits
Setting (Pins 6 to 8)
ON
1 2 3 4 5 6 7 8
ON
Number of LR Bits
Setting (Pins 6 to 8)