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Proprietary to OmniVision Technologies
Version 1.1, December 7, 2004
OV9650 Color CMOS SXGA (1.3 MegaPixel) CameraChip™
O
mni
ision
6.2.1 ITU-656 Format Enable
Instead of using HREF to define each row, the ITU-656 standard inserts a 4-byte header before and
after the row data.
Header Footer: [FF] [00] [00] [Sync Byte]
OmniVision suggests using output range control register
[7:6] (0x40) to limit image data
range so that the image data does not contain 0x00 and 0xFF.
6.2.2 Frame Rate Adjust
The OV9650 offers three methods of frame rate adjustment using the clock prescaler (see
), by inserting ’dummy’ pixels in each row’s output, and by inserting dummy lines in
each frame output. By inserting these dummy pixels (using
[6:4] (0x2A) and
[7:0]
(0x2B)), the frame rate can be changed while leaving the pixel unchanged.
[6:4] (0x2A) +
[7:0] (0x2B)
Refer to
for the number of dummy pixels that changes the frame rate.
By inserting dummy lines at frame output, the user can get the same data rate and the same data
read out time at one frame.
Also, in low light (night mode) conditions, the user can turn on auto frame adjust to decrease the
random noise and increase the sensitivity (get more exposure time). In this mode,
[7] (0x3B)
is high.
[6:5] (0x3B) is used to control the frame adjust range. See
for details.
Auto Frame Rate Adjust
Range
0x3B
00:
Frame rate does not change
01:
Minimum 1/2 frame rate
10:
Minimum 1/4 frame rate
11:
Minimum 1/8 frame rate
Pixel Delay Select
[7:0]
0x1B
Output HSYNC on HREF
Pin Enable
[6]
0x15
0: HREF
1: HSYNC
PCLK Output Gated by
HREF Enable
[5]
0x15
0: Free running PCLK
1: PCLK gated by HREF
HSYNC Rising Edge
Delay
[1:0] (MSB)
[7:0] (LSB)
0x2A
0x30
HSYNC Falling Edge
Delay
[3:2] (MSB)
[7:0] (LSB)
0x2A
0x31
VSYNC and
HREF/DATA drop
[2:1]
0x14
Drop over-exposure image
Table 6-4. Data Formatting (Sheet 2 of 2)
Function
Register
Address
Note