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8.0 ELECTRICAL SPECIFICATIONS

(Typical specifications for 25 DegC unless otherwise specified.)

8.1 ANALOG INPUT SECTION

A/D converter type

7800

Resolution

12 bits

Programmable ranges

PCI-DAS1001

±10V, ±1V, ±0.1V, ±0.01V, 0 - 10V, 0 - 1V, 0 - 0.1V, 0 - 0.01V

PCI-DAS1002

±10V, ±5V, ±2.5V, ±1.0V, 0 - 10V, 0 - 5V, 0 - 2.5V, 0 - 1.0

A/D pacing

Programmable: internal counter or external source (A/D External Pacer)
or software polled

Burstmode

Software selectable option, rate = 6.67µs

A/D Trigger sources

External digital (A/D External Trigger)

A/D Triggering Modes

Digital:

Software enabled, rising edge, hardware trigger

Pre-trigger:

Unlimited pre- and post-trigger samples. Total # of samples must be >
512.

Data transfer

From 1024 sample FIFO via REPINSW, interrupt or software polled

Polarity

Unipolar/Bipolar, software selectable

Number of channels

8 differential or 16 single-ended, software selectable

A/D conversion time

3µs

Throughput

150KHz min

Relative Accuracy

±1.5LSB

Differential Linearity error

±0.75 LSB

Integral Linearity error

±0.5 LSB typ, ±1.5 LSB max

Gain Error (10V,1V and 0.1V Ranges)

± 0.02% of reading Max

Gain Error (0.01V Range)

± 0.4% of reading Max

No missing codes guaranteed

12 bits

Gain drift (A/D specs)

±6ppm/°C

Zero drift (A/D specs)

±1ppm/°C

Common Mode Range

±10V

CMRR @ 60Hz

70dB

Input leakage current

200nA

Input impedance

10Meg Ohms Min

Absolute maximum input voltage

±15V

Содержание PCI-DAS1001

Страница 1: ...User s Guide http www omega com e mail info omega com PCI DAS1001 PCI DAS1002...

Страница 2: ...ENTIAL INPUTS 10 4 2 1 COMMON GROUND SINGLE ENDED INPUTS 9 4 2 WIRING CONFIGURATIONS 7 4 1 2 SYSTEM GROUNDS AND ISOLATION 5 4 1 1 SINGLE ENDED AND DIFFERENTIAL INPUTS 5 4 1 ANALOG INPUTS 5 4 0 ANALOG...

Страница 3: ...ONTROL REGISTERS 27 7 5 2 DIGITAL I O DATA AND CONTROL REGISTERS 26 7 5 1 ADC PACER CLOCK DATA AND CONTROL REGISTERS 26 7 5 BADR3 25 7 4 2 ADC FIFO CLEAR REGISTER 25 7 4 1 ADC DATA REGISTER 25 7 4 BAD...

Страница 4: ...put ranges These are shown below PCI DAS1002 Bipolar 10V 5V 2 5V and 1 25V Unipolar 0 10V 0 5V 0 2 5V and 0 1 25V PCI DAS1001 Bipolar 10V 1 0V 0 1V and 0 01V Unipolar 0 10V 0 1 0V 0 0 1V and 0 0 01V T...

Страница 5: ...ave ordered the Universal Library the Universal Library CD disks install both the library and InstaCal The installation will create all required files and unpack the various pieces of compressed softw...

Страница 6: ...rrently installed by InstaCal then the PCI DAS1000 board will be assigned board number 0 Otherwise it will be assigned the next available board number You can now view and change the board configurati...

Страница 7: ...8 High 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Analog Ground 18 NC 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 CLK 4 39 GATE 4 40 OUT 4 41 A D External Pacer 42 NC 43 NC 44 A D External Trigger 45...

Страница 8: ...0 provides either 8 differential or 16 single ended input channels The concepts of single ended and differential inputs are discussed in the following section Single Ended Inputs A single ended input...

Страница 9: ...d common mode range CM Range Common mode voltage is depicted in the diagram above as Vcm Though differential inputs measure the voltage between two signals without almost respect to the either signal...

Страница 10: ...lace one voltmeter probe on the PC ground and the other on the signal source ground Measure both the AC and DC Voltages If you do not have access to a voltmeter skip the experiment and take a look a t...

Страница 11: ...umb if your signal source or sensor is not connected directly to an LLGND pin on your PCI DAS1000 it s best to assume that you do not have a common ground even if your voltmeter measured 0 0 Volts Con...

Страница 12: ...t require some extra effort during connections to assure optimum performance is obtained Please refer to the following sections for further details 4 2 WIRING CONFIGURATIONS Combining all the groundin...

Страница 13: ...e recommended connections in this configuration 4 2 3 Common Mode Voltage 10V Single Ended Inputs This is not a recommended configuration In fact the phrase common mode has no meaning in a single ende...

Страница 14: ...uce the overall common mode voltage or add isolated signal conditioning between the source and your board 11 Input Am p To A D A D Board I O Connector LL GND CH High CH Low Signal Source with Comm on...

Страница 15: ...figuration 12 System with a Large Common Mode Voltage Connected to a Differential Input Large common mode voltage between signal source A D board G ND Isolation Barrier When the voltage difference bet...

Страница 16: ...and A D Board Already Isolated Already isolated signal source and A D board connected to a differential input GND These grounds are electrically isolated 10 K 10K is a recom m ended value You m ay sho...

Страница 17: ...program ming languages If you are planning to write programs or would like to run the example programs for Visual Basic or any other language please turn now to the UniversalLibrary manual The opition...

Страница 18: ...ents are made via 8 bit calibration DACs or 7 bit digital potentiome ters referenced to an on board factory calibrated standard Calibration factors are stored on the serial nvRAM A variety of methods...

Страница 19: ...Trim Dac Fine Trim Dac Coarse Trim Dac Fine Gain Adj Trim Dac Coarse Trim Dac Fine Trim Dac Coarse Trim Dac Fine Trim Dac Coarse Trim Dac Fine Trim Dac Coarse Trim Dac Fine Trim Dac Coarse Trim Dac F...

Страница 20: ...eed to be the same even on subsequent power on cycles of the same machine All software must interrogate BADR0 at run time with a READ_CONFIGURATION_WORD instruction to determine the BADRn values Pleas...

Страница 21: ...Full latch 0 No Effect NOTE It is not necessary to reset any write clear bits after they are set READ EOAI INT EOBI ADHFI ADNEI ADNE LADFUL 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Read operations to th...

Страница 22: ...lost 0 Indicates non overflow condition of ADC FIFO 7 3 2 ADC CHANNEL MUX AND CONTROL REGISTER BADR1 2 This register sets channel mux HI LO limits ADC gain offset and pacer source A Read Write registe...

Страница 23: ...1 0 10V 0 0 1 4 88 uV 1 000 0 01V 1 1 0 48 8 uV 100 0 1V 0 1 0 488 uV 10 1V 1 0 0 4 88 mV 1 10V 0 0 0 Measurement Resolution Input Gain Input Range GS0 GS1 UNIBIP ADPS 1 0 These bits select the ADC P...

Страница 24: ...etting of the TS 1 0 and TGEN bits Once these bits are set the next rising edge will start a Paced ADC conversion Subsequent triggers will have no effect until external trigger flop is cleared XTRCL B...

Страница 25: ...maining count 1024 Via SW immediately 0 0 Sample CTR Starts on FIFO Mode ARM is set FFM0 PRTRG C0SRC This bit allows the user to select the clock source for user Counter 0 1 Internal 10MHz oscillator...

Страница 26: ...hannel SEL7376 This bit latches the 7 bit serial data stream into the AD7376 digital potentiometer 10KOhm The AD7376 is used for analog front end gain calibration CSRC 2 0 These bits select the differ...

Страница 27: ...disabled The power on state of this bit is 0 MODE This bit determines the analog output mode of operation 1 Both DAC0 and DAC1 updated with data written to DAC0 data register 0 DACn updated with data...

Страница 28: ...may be used to signal that the ADC conversion is complete and the data word is present in the FIFO READ AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 0 0 0 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15...

Страница 29: ...0 DATA ADC POST TRIGGER CONVERSION COUNTER BADR3 0 READ WRITE D0 D1 D2 D3 D4 D5 D6 D7 0 1 3 2 4 5 6 7 Counter 0 is used to stop the acquisition when the desired number of samples have been gathered It...

Страница 30: ...by count written to the specific Counter Register The Counters on the 8254 are 16 bit devices Since the interface to the 8254 is only 8 bits wide Count data is written to the Counter Register as two s...

Страница 31: ...GISTER BADR3 7 The DIO Control register is used configure Ports A B and C as inputs or outputs Operation is identical to that of the 8255 in Mode 0 WRITE D0 D1 D2 D3 D4 D5 D6 D7 0 1 3 2 4 5 6 7 The fo...

Страница 32: ...ed number of post trigger samples software can then calculate how may 1 2 FIFO data packets need to be collected and what corresponding residual sample count needs to be written to BADR3 0 8254B COUNT...

Страница 33: ...ntrol Register then the proper count data must be written to the specific Counter Regis ter The Counters on the 8254 are 16 bit devices Since the interface to the 8254 is only 8 bits wide Count data i...

Страница 34: ...pdate of both DAC0 and DAC1 with the data written to this regis ter The data format is dependent upon the offset mode described below Bipolar Mode Offset Binary Coding 000 h FS 7FFh Mid scale 0V FFFh...

Страница 35: ...rigger Pre trigger Unlimited pre and post trigger samples Total of samples must be 512 Data transfer From 1024 sample FIFO via REPINSW interrupt or software polled Polarity Unipolar Bipolar software s...

Страница 36: ...Current Drive 5 mA min Output short circuit duration 25 mA indefinite Output Coupling DC Amp Output Impedance 0 1 Ohms max Miscellaneous Power up and reset all DAC s cleared to 0 volts 200mV 8 3 PARAE...

Страница 37: ...put at 100pin connector CLK4 or internal 10MHz software selectable Gate User input at 100pin connector GATE4 Output Available at 100pin connector OUT4 Counter 1 User Counter 5 Source User input at 100...

Страница 38: ...EEC Essential requirements relating to electromagnetic compatibility EU 55022 Class B Limits and methods of measurements of radio interference characteristics of information technology equipment EN 50...

Страница 39: ......

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