Oki C910, Руководство по обслуживанию, Страница: 24 / 282

44043511TH Rev.2
23 /
Oki Data CONFIDENTIAL
Main Control PCB (AS3-PCB) 1200dpi-RoHS
C
P
U
C
el
er
on
-M
1
G
H
z
(U100)
w/Heatsink(U101)
S
outhBridge 6300ESB (U301)
DDR-RA
M
(J
67
5)
HDD (J
75
5)
P
or
t
no
t
used
R
ed
w
oo
d
(U2400)
LAN
R
J4
5
C
on
ne
ct
or
(J2575
)
U
S
B
2.
0_
de
vi
ce
connecto
r
(J2650
)
VX500 (U2303)
Xilinx Spartan
3
FPGA (U7200)
E
ng
in
e
I/F
Connecto
r
(U7000)
PCI 160pin Slot For Banyan
3
(J
74
00
)
PCI-X Bus (3.3V, 32bit, 66MHz)
B
IO
S
(U
53
0)
FAN_V
X
(J
48
2)
F
A
N
_C
P
U
(J
48
4)
FAN Control
LM6000CIMTX
(U
48
0)
Clock Generator
C
Y
22
15
0F
C
(U7300)
OSC 20MHz (Y
73
00
)
Clock Gen
CY2840OXC
(U375)
XilinxCPL
D
(U
76
5)
V
_C
O
R
E
1.05V
1.8V
1.05V
1.5V 2.5V 3.3V
DD
R
I/F
LP
C
I/
F
SDA,SCLK
1.5V
3.3V
1.05V
3.
3V
2.
5V
V
X
500_CORE
3.3V 1.2V 3.3V
X
'ta
l
14.31818M
(Y375)
166MHz
RTC X'tal 32.768kH
z
(Y300)
3.3V
B
at
te
ry
BT30
0
WCLK
G
bi
t L
A
N
P
H
Y
D
P
83
86
5D
V
H
(U257)
X
'ta
l 2
5M
(Y2575)
1.5V 3.3V
P
C
I C
LK
3
3M
, 6
6M
OSC 48M
(Y2650)
D
IA
G
L
E
D
0
3.3V
1 2 3
5.0V
R
es
et
FPGA_LED_A
HDD LED
H
W
_R
S
T
S
P
I I
/F
S
P
I I
/F
SPI I/
F
V
ID[4:0]
C
P
U
C
LK
100M
C
P
U
C
LK
1
00
M
Northbridge CLK 100M S
ou
th
br
id
ge
C
LK
1
00
M
48
M
, 1
4M
3.3V
Northbridge CLK 100M
P
C
I C
LK
3
3M
, 6
6M
S
ou
th
br
id
ge
C
LK
1
00
M
48
M
, 1
4M
P
C
I C
LK
3
3M
P
C
I C
LK
6
6M
P
C
I C
LK
6
6M
D+,D-, VBUS,GND
TD,R
D
Hublink1.5(66MHz)
F
S
B
(4
00
M
H
z)
F
A
N
_N
B
(J
48
3)
FAN_DS
P
(J
48
1)
F
P
G
A
_F
A
N
F
P
G
A
_F
A
N
1.
25
V
N
or
th
B
rid
ge
854GM
E
(U170)
66M
P
C
I B
us
(
3.
3V
, 3
2b
it,
3
3M
H
z)
V
id
eo
_2
.5
V
KEYCHIP (U7203
)
EEPROM 24C256 (U7202)
V
id
eo
_2
.5
V
26
7
D
H
D
D
L
E
D
D+,D-, VBUS,GND
USB2.0_host connecto
r
(J
46
0)
P
0
D
D
R
-R
A
M
(J
67
6)
IDF-I/F
secondary
IDF-I/F
primar y
5.0V
5.0V
3.3V
5.0V
D76
3
Figure 2-1-2