Technical Data – 71
W4: Interrupt Select
Pins Jumpered
Bus IRQ
CPU IRQ
[1-2]
IRQ4
IRQ11
[3-4]*
IRQ4
IRQ4
[5-6]
IRQ3
IRQ10
[7-8]*
IRQ3
IRQ3
* = default
NOTE: IRQ6 on bus is tied to IRQ12 on the CPU.
W8: SSD 1 Memory Device Select
Pins Jumpered
Des cription
[1-3][2-4]
Flash
memory
*
[3-5][4-6]
EPROM
* = default
CONNECTOR PINOUTS
1
2
3
4
5
6
7
8
9
10
Figure 15–1—Typical 10–pin IDC Connector
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Страница 20: ...Overview 10 This page intentionally left blank S t o c k C h e c k c o m ...
Страница 52: ...Watchdog Timer 42 This page intentionally left blank S t o c k C h e c k c o m ...
Страница 56: ...Serial EEPROM 46 This page intentionally left blank S t o c k C h e c k c o m ...
Страница 68: ...PC 104 58 This page intentionally left blank S t o c k C h e c k c o m ...
Страница 76: ...Troubleshooting 66 This page intentionally left blank S t o c k C h e c k c o m ...