NXP Semiconductors
TR1329
Systems & Applications
TR1329
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
User Manual
Rev. 01.20
— 31 January 2018
17 of 19
6. List of figures
Fig 1.
Customer PHY Board Top View ........................ 3
Fig 2.
Pin 1 Location ................................................... 5
Fig 3.
Bit Strapping Jumper Settings ........................... 7
Fig 4.
Bit Strapping Jumpers on PCB ......................... 8
Fig 5.
MII Connector Location and Pinning Order ....... 9
Fig 6.
MDI Pinning Order .......................................... 11
Fig 7.
LEDs on the Board .......................................... 12
