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Introduction

S32R274/372 EVB User Guide, Rev. 0, 08/2018

2

NXP Semiconductors

Table 1. List of acronyms

Acronym

Description

1.25V_SR

Supply voltage from the 1.25 V switching regulator

3.3V_SR

Supply voltage from the 3.3 V switching regulator

5V_LR

Supply voltage from the 5.0 V linear regulator

5V_SR

Supply voltage from the 5.0 V switching regulator

ADC

Analog-to-Digital converter

RESET_B

External signal reset

EVB

Evaluation board

FEC

Fast ethernet controller module

GND

Ground

HV

High voltage (3.3 V and/or 5 V)

LED

Light emitting diode

LV

Low voltage (1.25 V)

MCU

Microcontroller

OSC

Oscillator

P12V

12 V EVB supply power domain

VREG_POR_B

Power-on reset

PWR

Power

RX

Receive

SIPI

Serial Interprocessor Interface

TBD

To be defined

TX

Transmit

VSS

Ground

1.2. Modular concept

For maximum flexibility and simplicity, the EVB has been designed as a modular development
platform. The EVB main board does not contain an MCU. Instead, the MCU is fitted to an MCU
daughter card (occasionally referred to as an adapter board). This approach means that the same EVB
platform can be used for multiple packages and MCU derivatives within the MPC57xx and further
families. High density connectors provide the interface between the EVB and MCU daughter cards as
shown in the diagram below. See section 3.7 for more details on the daughter cards and section 4.8 for
more details on the interface connectors.

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Содержание S32R274

Страница 1: ...s document NXP Semiconductors Document Number S32R274 372EVBUG User Guide Rev 0 08 2018 Contents 1 Introduction 1 1 1 List of Acronyms 1 1 2 Modular Concept 2 1 3 Daughter Card Availability 3 2 EVB Features 3 3 Configuration 5 3 1 Power Supply Configuration 5 3 2 CAN Configuration 8 3 3 RS232 Configuration 9 3 4 LIN Configuration 10 3 5 FlexRAY Configuration 11 3 6 Ethernet Configuration 12 3 7 Mo...

Страница 2: ...or P12V 12 V EVB supply power domain VREG_POR_B Power on reset PWR Power RX Receive SIPI Serial Interprocessor Interface TBD To be defined TX Transmit VSS Ground 1 2 Modular concept For maximum flexibility and simplicity the EVB has been designed as a modular development platform The EVB main board does not contain an MCU Instead the MCU is fitted to an MCU daughter card occasionally referred to a...

Страница 3: ... numbers Table 2 Daughter card overview Daughter card number Device Package Socket Nexus S32R274RRUEVB S32R274 257BGA Yes Yes S32R372RRSEVB S32R372 257BGA Yes Yes All daughter cards will be similar in design and concept For details on the daughter cards please refer to section 3 7 It should be noted that both daughtercards listed are the same physical board but separate part numbers exist in order...

Страница 4: ...ce mount loops placed throughout the EVB The daughter cards provide the following features MCU soldered or through a socket Flexible MCU clocking options allow provision of an external clock via SMA connector or 40 MHz EVB clock oscillator circuit Solder pads on the daughter card allow selection between these external clocks SMA connectors including differential clock input on CLKIN signal for eas...

Страница 5: ... been used throughout the board to identify all switches jumpers and user connectors Figure 2 EVB functional blocks 3 1 Power supply configuration The EVB requires an external power supply voltage of 12 V DC minimum 1 5 A This allows the EVB to be easily used in a vehicle if required The single input voltage is regulated on board using three switching regulators to provide the necessary EVB and MC...

Страница 6: ...ut 3 1 1 Motherboard powers supply connectors 2 1 mm Barrel Connector P26 Figure 3 2 1 mm power connector Screw Terminal Power Connector P33 This can be used to connect a bare wire lead to the EVB typically from a laboratory power supply The polarisation of the connectors is clearly marked on the EVB Pin 1 12 V Care must be taken to ensure correct connection Figure 4 Screw terminal power connector...

Страница 7: ...ser guide for details 3 1 3 Power switch status LEDs and fuse The main power switch slide switch SW5 can be used to isolate the power supply input from the EVB voltage regulators if required Moving the slide switch to the right away from connector P33 will turn the EVB on Moving the slide switch to the left towards connector P33 will turn the EVB off When power is applied to the EVB four green pow...

Страница 8: ...out For flexibility the CAN transceiver I Os are also connected to two standard 0 1 connectors P4 and P5 at the top side of the PCB The pin out for these connectors is shown in the figure below Figure 6 CAN 3pin header interface connector By default the CAN interfaces are not enabled To enable the CAN interfaces the jumpers detailed in Table 3 need to be placed Table 3 CAN control jumpers Jumper L...

Страница 9: ... MCAN1 TX J38 PHY U1 RX to MCU 1 2 TTCAN RX 2 3 MCAN1 RX J36 PHY U1 signal out 1 ERR 2 INH 3 3 RS232 configuration Female DB9 connector J19 and MAX3221E RS232 transceiver device provide a physical RS232 interface allowing a direct RS232 connection to a PC or terminal The pin out of these connectors is detailed in Figure 7 Note that hardware flow control is not supported on this implementation Figu...

Страница 10: ...f the Molex connector J4 is shown in the figure below Figure 8 LIN Molex connector For flexibility the LIN transceiver is also connected to a standard 0 1 connector P3 at the top side of the PCB as shown in Figure 9 For ease of use the 12V EVB supply is fed to pin1 of P3 and the LIN transceiver power input to pin2 This allows the LIN transceiver to be powered directly from the EVB supply by simply...

Страница 11: ...ivers and two alternative connectors Jumpers J27 and J30 are provided to route the respective MCU signals to the physical interfaces The pin out of the DB9 connector J2 is shown in the figure below Figure 10 FlexRAY DB9 connector pinout For flexibility the FlexRAY transceiver is also connected to two FlexRAY connectors P1 P2 and two 2pin Molex connectors J1 J3 not populated by default at the top s...

Страница 12: ... to MCU J31 FR_B PHY U5 configuration 1 2 3 3 V VIO to BGE 3 4 3 3 V VIO to EN 5 6 3 3 V VIO to STBY 7 8 GND to WAKE 3 6 Ethernet configuration The EVB is fitted with a standard RJ45 Ethernet connector J7 and a DP83848C 10 100 Ethernet transceiver U6 This is however not used in conjunction with the S32R274RRUEVB daughter card since it is fitted with its own Gb Ethernet physical interface and RJ45 ...

Страница 13: ...ference 1 25V_SR JP3 User Area Pin 1 25V_SR reference 1 25V_SR JP4 User Area Pin 1 25V_SR reference 3 3V_SR JP5 User Area Pin 3 3V_SR reference 3 3V_SR JP6 User Area Pin 3 3V_SR reference 3 3V_SR JP7 User Area Pin 3 3V_SR reference 3 3V_SR JP8 User Area Pin 3 3V_SR reference 5V_SR JP9 User Area Pin 5V_SR reference 5V_SR JP10 User Area Pin 5V_SR reference 5V_SR JP11 User Area Pin 5V_SR reference 5V...

Страница 14: ...RXEN TP8 Pad FlexRAY FR_DBG0 TP10 Pad FlexRAY debug0 FR_DBG1 TP11 Pad FlexRAY debug1 FR_DBG2 TP12 Pad FlexRAY debug2 FR_DBG3 TP13 Pad FlexRAY debug3 FEC 25MHz TP9 Pad Ethernet clock 4 Configuration Daughter card This section details the configuration of each of the daughter card s functional blocks The daughter card has been designed with ease of use in mind and has been segmented into functional ...

Страница 15: ...tors 15 Figure 12 Daughter card functional blocks 4 1 MCU power 4 1 1 Supply routing and jumpers The different MCU supply inputs are connected to the regulators on the motherboard through the interface connector Figure 13 shows how the MCU power domains are connected to the regulators ...

Страница 16: ...escription J5 Connects Digital HV supplies to 3 3V_SR J2 Connects Digital LV supplies to 1 25V_SR J7 Connects AFE Supply to 3 3V_LR via LDO J3 Connects AFE Supply to 3 3V_SR via LDO MCU Power 5 V Switcher 3 3 V Switcher 1 25 V Switcher 5 V Linear VBat All LV Supplies in External Mode only All Other Digital HV Supplies VDD_HV_REG3V8 VDD_HV_DAC VDD_HV_RAW LDO From Mother Board Default Connection LDO...

Страница 17: ... external voltage monitoring IC connected to VREG_POR_B The RESET_B signal is also connected to the signal RST SW that is connected to the mother board to reset peripherals A yellow LED D2 is used to indicated RESET_B reset situations and a red LED D9 indicates VREG_POR_B reset situations The EVB reset circuit provides the following functionality The reset switch SW2 can be used to reset the MCU T...

Страница 18: ...16 MHz oscillator the MCU can be clocked by different external sources The EVB system supports four possible MCU clock sources 1 40 MHz crystal Y3 The MCU only has a 40 Mhz input 2 External clock input to the EVB via the SMA connector J20 driving the MCU EXTAL signal 3 External differential clock input to the EVB via SMA connectors J20 J22 driving MCU EXTAL and XTAL with negative and positive cloc...

Страница 19: ...ser Guide Rev 0 08 2018 NXP Semiconductors 19 Figure 16 40MHz crystal circuit 4 4 JTAG The EVB is fitted with 14 pin JTAG debug connector The following diagram shows the 14 pin JTAG connector pinout 0 1 keyed header Figure 17 JTAG connector pinout ...

Страница 20: ...6 EVTI0 17 VSS 18 EVTO0 19 TX3 20 VREG_POR_B 21 TX3 22 RESET_B 23 VSS 24 VSS 25 TX4 1 26 CLK 27 TX4 1 28 CLK 29 VSS 30 VSS 31 TX5 1 32 EVTO1 RDY 33 TX5 1 34 N C GND VSS GND VSS 4 6 Serial Interprocessor Interface SIPI A dedicated SIPI interface connector is provided on the daughter card For signal integrity the SIPI signals are not routed to the mother board Test points are provided on the signals...

Страница 21: ...003 Radar front end EVK To preserve signal integrity MIPI CSI2 signals are not routed to the motherboard A 60 pin Samtec connector QTH 030 01 L D A K TR is used for the MIPI CSI2 interface The pinout of the connector is shown in Figure 19 Figure 19 MIPI CSI2 connector pinout 4 8 Gigabit Ethernet The S32R274RRUEVB daughtercard includes support for Gb ethernet utilizing the RGMII interface present o...

Страница 22: ... device If for any reason the alternate functions multiplexed on the RGMII pads are required then these signals can be routed to the motherboard by adding a 0 ohm link to the pads provided These are not soldered by default to reduce the signal trace length and parasitic Gb ethernet operation cannot be guaranteed if these links are in place since it adds significant length to the signal path Figure...

Страница 23: ...ultiplexable functions these can be configured as follows By default CAN0 signals will go straight to U14 But if for any reason the motherboard physical interface or other pad functions should be used then the signals can be diverted to the motherboard by removing R155 and R156 0 ohm links Populating R157 and R158 respectively Similarly CAN2 signals can be routed to either the on board CAN FD phy ...

Страница 24: ...hing regulator output 1V2_LR_HV TP7 Surface Pad 1 2V Ethernet phy regulator output 1 25V_SR_LDO TP8 Surface Pad 1 25V Core supply VDD_LV_RADARDIG TP9 Surface Pad 1 4V RADAR Reference VDD_LV_RADARREF TP10 Surface Pad 1 4V RADAR Reference VDD_HV_RAW TP11 Surface Pad Analog supply for 1 4v on chip regulators VDD_HV_DAC TP12 Surface Pad 3 3V Analog supply for DAC VDD_HV_DAC_2V5 TP13 Surface Pad 2 5V s...

Страница 25: ...position 1 2 5V_DC_R 4 12 Configuring external VREG Mode v Table 12 Jumper Configuration for external VREG mode Jumper Number Default position Function J2 3 4 1 25 V supply J3 3 4 5 0 V supply to create 3 3v for the AFE Regulator J5 3 4 3 3 V supply for the device J7 3 4 5 0 V Linear supply from Motherboard for SAR ADC Reference voltage J8 on 1 25 V MIPI CSI2 DPHY J9 on 3 3 V IO J10 2 3 Determine ...

Страница 26: ...er Number Default position Function J2 3 4 1 25 V supply J3 3 4 5 0 V supply to create 3 3v for the AFE Regulator J5 3 4 3 3 V supply for the device J7 3 4 5 0 V Linear supply from Motherboard for SAR ADC Reference voltage J8 on 1 25 V MIPI CSI2 DPHY J9 on 3 3 V IO J10 1 2 Determine internal or external Vreg Mode J11 1 2 3 4 ACD Ref J21 2 3 VPP TEST always GND J30 on 3 3 V RGMII J31 1 2 3 4 Linfle...

Страница 27: ...nd user area port pins The column 257 BGA shows the connections from the MCU pins to the interface connector on daughter card for the 257 BGA package It is ensured that the MCU port pins are routed to the associated user area port pin on the motherboard but in some cases due to pin multiplexing uses this is not possible The schematic signal name is included in brackets but for all possible multipl...

Страница 28: ... B 230 PB6 GPIO 22 CLKOUT0 A 12 PA7 NC B 229 PB7 ADC0_AN0 A 13 PA8 NC B 228 PB8 ADC0_AN1 A 14 PA9 GPIO 9 PA9 B 227 PB9 ADC0_AN11 A 15 PA10 GPIO 10 DSPI2_CS0 B 226 PB10 ADC0_AN12 A 16 PA11 GPIO 11 DSPI2_SCK B 225 PB11 ADC0_AN13 A 17 PA12 GPIO 12 DSPI2_SOUT B 224 PB12 ADC0_AN14 A 18 PA13 GPIO 13 DSPI2_SIN B 223 PB13 ADC1_AN0 A 19 PA14 GPIO 14 CAN1_TXD B 222 PB14 ADC1_AN1 A 20 PA15 GPIO 15 CAN1_RXD B...

Страница 29: ... 3V_SR 3 3V_SR B 198 3 3V_SR 3 3V_SR A 44 3 3V_SR 3 3V_SR B 197 3 3V_SR 3 3V_SR A 45 PE0 NC B 196 PF0 NC A 46 PE1 NC B 195 PF1 NC A 47 PE2 ADC0_AN_5 B 194 PF2 NC A 48 PE3 NC B 193 PF3 NC A 49 PE4 ADC0_AN_7 B 192 PF4 NC A 50 PE5 ADC0_AN_8 B 191 PF5 NC A 51 PE6 ADC0_AN_4 B 190 PF6 NC A 52 PE7 ADC0_AN_6 B 189 PF7 NC A 53 PE8 NC B 188 PF8 NC A 54 PE9 NC B 187 PF9 NC A 55 PE10 NC B 186 PF10 NC A 56 PE1...

Страница 30: ...106 PG10 R75 B 166 PH10 GPIO 50 FLEXRAY_CB_RX R69 A 76 PG11 GPIO 107 PG11 R76 B 165 PH11 NC A 77 PG12 NC B 164 PH12 NC A 78 PG13 NC B 163 PH13 GPIO 125 PH13 R81 A 79 PG14 NC B 162 PH14 NC A 80 PG15 NC B 161 PH15 NC A 81 5 0V_SR 5 0V_SR B 160 3 3V_SR 3 3V_SR A 82 5 0V_SR 5 0V_SR B 159 3 3V_SR 3 3V_SR A 83 5 0V_SR 5 0V_SR B 158 3 3V_SR 3 3V_SR A 84 5 0V_SR 5 0V_SR B 157 3 3V_SR 3 3V_SR A 85 PI0 NC B...

Страница 31: ...3 PL3 NC A 109 PK4 NC B 132 PL4 NC A 110 PK5 NC B 131 PL5 NC A 111 PK6 NC B 130 PL6 NC A 112 PK7 NC B 129 PL7 NC A 113 PK8 NC B 128 PL8 NC A 114 PK9 NC B 127 PL9 NC A 115 PK10 NC B 126 PL10 NC A 116 PK11 NC B 125 PL11 NC A 117 PK12 NC B 124 PL12 NC A 118 PK13 NC B 123 PL13 NC A 119 PK14 NC B 122 PL14 NC A 120 PK15 NC B 121 PL15 NC A 121 5 0V_LR 5 0V_LR B 120 5 0V_LR 5 0V_LR A 122 5 0V_LR 5 0V_LR B...

Страница 32: ..._IO_FLEX 3 3v_SR_LDO B 98 NC NC A 144 VDD_HV_IO_FLEX 3 3v_SR_LDO B 97 NC NC A 145 PO0 NC B 96 PP0 NC A 146 PO1 NC B 95 PP1 NC A 147 PO2 NC B 94 PP2 NC A 148 PO3 NC B 93 PP3 NC A 149 PO4 NC B 92 PP4 NC A 150 PO5 NC B 91 PP5 NC A 151 PO6 NC B 90 PP6 NC A 152 PO7 NC B 89 PP7 NC A 153 PO8 NC B 88 PP8 NC A 154 PO9 NC B 87 PP9 NC A 155 PO10 NC B 86 PP10 NC A 156 PO11 NC B 85 PP11 NC A 157 PO12 NC B 84 P...

Страница 33: ... PR13 NC A 179 PQ14 NC B 62 PR14 NC A 180 PQ15 NC B 61 PR15 NC A 181 5 0V_SR 5 0V_SR B 60 5 0V_SR 5 0V_SR A 182 5 0V_SR 5 0V_SR B 59 5 0V_SR 5 0V_SR A 183 5 0V_SR 5 0V_SR B 58 5 0V_SR 5 0V_SR A 184 5 0V_SR 5 0V_SR B 57 5 0V_SR 5 0V_SR A 185 PS0 NC B 56 PT0 NC A 186 PS1 NC B 55 PT1 NC A 187 PS2 NC B 54 PT2 NC A 188 PS3 NC B 53 PT3 NC A 189 PS4 NC B 52 PT4 NC A 190 PS5 NC B 51 PT5 NC A 191 PS6 NC B ...

Страница 34: ...A 214 PU9 NC B 27 PV9 NC A 215 PU10 NC B 26 PV10 NC A 216 PU11 NC B 25 PV11 NC A 217 PU12 NC B 24 PV12 NC A 218 PU13 NC B 23 PV13 NC A 219 PU14 NC B 22 PV14 NC A 220 PU15 NC B 21 PV15 NC A 221 VDD_HV_IO_MAIN 3 3v_SR_LDO B 20 VDD_HV_IO_MAIN 3 3v_SR_LDO A 222 VDD_HV_IO_MAIN 3 3v_SR_LDO B 19 VDD_HV_IO_MAIN 3 3v_SR_LDO A 223 VDD_HV_IO_MAIN 3 3v_SR_LDO B 18 VDD_HV_IO_MAIN 3 3v_SR_LDO A 224 VDD_HV_IO_MA...

Страница 35: ...DC J16 5 DAC J18 6 CTE J13 7 MIPI CSI2 J15 8 RGMII U8 Gb Ethernet Physical Layer 6 Default jumper summary table The details for the DEFAULT jumper configuration of the EVB as set up on delivery can be found in Table 12 and Table 13 depending on the required regulation mode 6 1 Default jumper table motherboard On delivery the motherboard comes with a default jumper configuration Table 15 lists and ...

Страница 36: ...ernet signal RXCLK J20 Off Ethernet signal CRS_LEDCFG J21 Off CAN2_EN PHY U2 configuration 1 2 WAKE to GND 3 4 STB to 5V 5 6 EN to 5V J22 On Ethernet phy power on J23 Off CAN EN PHY U1 configuration 1 2 WAKE to GND 3 4 STB to 5V 5 6 EN to 5V J24 Off Ethernet signal RXER_MDIXEN J25 Off SCI PWR SCI phy power on J26 Off Ethernet signal RXDV_MIIMODE J27 Off FR A 1 2 PHY U4 TX to MCU 3 4 PHY U4 TXEN to...

Страница 37: ...R 2 INH J35 Off CAN 1 2 5V_SR to PHY U1 VCC 3 4 12V to PHY U1 VBAT J36 Off CAN PHY U1 signal out J37 Off CAN TX connect J38 Off CAN RX connect J39 Off Ethernet signal RXD0_PHYAD1 J40 Off Ethernet signal RXD1_PHYAD1 J41 Off Ethernet signal RXD2_PHYAD2 J42 Off Ethernet signal RXD3_PHYAD3 J44 Off Ethernet signal COL_PHYAD0 J45 Off Ethernet signal TXEN J46 Off Ethernet signal TXCLK J47 Off Ethernet si...

Страница 38: ...ping area This area is ideal for the addition of any custom circuitry There are four active low user LEDs D2 D3 D4 and D5 these are driven by connecting a logic 0 signal to the corresponding pin on 0 1 header P7 USER LEDS The LED inputs are pulled to VDD_HV_IO_MAIN through 10kOhm resistors There are f active high pushbutton switches SW1 SW2 SW3 and SW4 which will drive 5 V onto the respective pins...

Страница 39: ......

Страница 40: ...educe the effect of these vulnerabilities on customer s applications and products and NXP accepts no liability for any vulnerability that is discovered Customers should implement appropriate design and operating safeguards to minimize the risks associated with their applications and products NXP the NXP logo NXP SECURE CONNECTIONS FOR A SMARTER WORLD COOLFLUX EMBRACE GREENCHIP HITAG I2C BUS ICODE ...

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