NXP Semiconductors
UM11653
RDGD3160I3PH5EVB Reference Design
Figure 3. RDGD3160I3PH5EVB test points
Test point name
Function
DCV
Micro DC voltage
DSTHU
DESAT high-side U phase V
CE
desaturation connected to DESAT pin circuitry
DSTHV
DESAT high-side V phase V
CE
desaturation connected to DESAT pin circuitry
DSTHW
DESAT high-side W phase V
CE
desaturation connected to DESAT pin circuitry
DSTLU
DESAT low-side U phase V
CE
desaturation connected to DESAT pin circuitry
DSTLV
DESAT low-side V phase V
CE
desaturation connected to DESAT pin circuitry
DSTLW
DESAT low-side W phase V
CE
desaturation connected to DESAT pin circuitry
FSISHU
Not used – for test purposes only
FSISHV
Not used – for test purposes only
FSISLU
Not used – for test purposes only
FSISLV
Not used – for test purposes only
FSISLW
Not used – for test purposes only
GHU
Gate high-side U phase which is the charging pin of IGBT gate
GHV
Gate high-side V phase which is the charging pin of IGBT gate
GHW
Gate high-side W phase which is the charging pin of IGBT gate
GLU
Gate low-side U phase which is the charging pin of IGBT gate
GLV
Gate low-side V phase which is the charging pin of IGBT gate
GLW
Gate low-side W phase which is the charging pin of IGBT gate
NCLU – NCHW
INTA test point connections to respective gate drive devices.
INTA fault reporting and real time VGE or VCE monitoring.
Resolver circuit
Test points for internal signals of resolver circuit (see schematic for more information)
SPI DBG
SPI signal port for analyzing SPI signals (see schematic for signals)
TSENSEHU
TSENSE high-side U phase connected to NTC temperature sense
TSENSEHV
TSENSE high-side V phase connected to NTC temperature sense
UM11653
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User manual
Rev. 1 — 12 August 2021
10 / 21
