NXP Semiconductors PTN3460, Руководство пользователя, Страница: 10 / 15

UM10492 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
User manual Rev. 1.1 — 16 March 2015 10 of 14
NXP Semiconductors
UM10492
PTN3460 eDP to LVDS bridge IC application board
JP6 CFG4/TDO 1-2 HIGH — LVDS output swing = 400 mV
open — LVDS output swing = 300 mV
2-3 LOW — LVDS output swing = 250 mV
1-2
JP7 CFG3/TDI 1-2 HIGH — LVDS clock frequency = 0.5 %
open — LVDS clock frequency = 1 %
2-3 LOW — LVDS clock frequency = 0 %
1-2
JP8 PD_N 1-2 HIGH — Operation mode
2-3 LOW — Force power-down
1-2
JP9 CFG2/TMS 1-2 HIGH — JEIDA or VESA format (18 bpp)
open — JEIDA format (24 bpp)
2-3 LOW — VESA format (24 bpp)
1-2
JP10 CFG1/TCK 1-2 HIGH — Dual LVDS bus
2-3 LOW — Single LVDS bus
1-2
JP11 EPS_N ON — Use external 3.3 V/1.8 V option
OFF — Use internal 1.8 V LDO
1-2
JP12 WP 1-2 HIGH — WP for S-EEPROM
2-3 LOW — No WP S-EEPROM
2-3
JP13 VDD_VOL 1-2 — 3V3 for panel
2-3 — 5V for panel
1-2
JP14 +INV_PWR 1-2 — 5V for backlight inverter
2-3 — 12V for backlight inverter
1-2
JP15 BKLTEN_CN 1-2 HIGH — Backlight enable is always ON
2-3 BKLTEN — Control by firmware
1-2
JP16 PVCCEN_PTN 1-2 HIGH — PVCCEN is always ON
2-3 PVCCEN — Control by firmware
1-2
JP17
(for PS8615
only)
PVCCEN
(pin 33 is used as
I2C_Addr/GPIO in
PS8615)
1-2 HIGH — I2C_ADDR 0xB0h to 0xBFh
2-3 LOW — I2C_ADDR 0x10h to 0x1Fh
not
loaded
JP18 +12V 1-2 — select from ATX power supply
2-3 — select from external power supply
2-3
JP19 +1V8 1-2 — select from U4 regulator
2-3 — select from external power supply
1-2
JP20 +5V 1-2 — select from ATX power supply
2-3 — select from external power supply
2-3
JP21 +3V3 1-2 — select from ATX power supply
2-3 — select from external power supply
2-3
JP22 AIOC_HPD ON — HPD drives Green LED
OFF — No LED drive to measure power
1-2
Table 3. Jumpers
…continued
Jumper
number Signal names Jumper settings Default
setting