NXP Semiconductors PN7360AUEV, Руководство пользователя

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NXP Semiconductors
UM10858
PN7462 family HW user manual
UM10858 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
User manual
COMPANY PUBLIC Rev. 1.4 — 14 May 2018
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12.4 Functional Description
Fig 33 shows an overview of the Contactless interface.
Fig 33. Contactless interface
12.4.1 Clock/Reset Block
The Clock/Reset module is the source of all clocks and reset used in the CLIF.
Table 184 summarized the input clocks of the CLIF module.
Table 184. Input clocks of CLIF
Symbol Source Frequency Description
clk_pll_27m12 PCR 27.12 MHz IP clock for active contactless
communication.
clk_rf_27m12 Clock
Recovery 27.12 MHz
Clock recovered from the RF-Field by
the analog CLIF clock recovery
clk_pcr_lfo PCR 380 KHz Low frequency oscillator clock
clk_pcr_hfo PCR 20 MHz High frequency oscillator clock
The main clock for the contactless interface is the clk13 - a 13.5 6MHz clock derived from
27.12 MHz clock either from PLL or the analog RF clock recovery. The RF clock is only