NXP Semiconductors PCA9959HN-ARD, Руководство пользователя, Страница: 31 / 32

NXP Semiconductors
UM11623
PCA9959HN-ARD evaluation board
Tables
Tab. 1. Revision history .................................................2
Tab. 2. Pin chart of Arduino connectors and their
usage .................................................................7
Tab. 3. Pin chart of Fuji connectors and their
functions ............................................................ 8
Tab. 4. Secondary tabs under Global ..........................21
Tab. 5. Secondary tabs under Channels – PAGE_
SEL 0 .............................................................. 23
Tab. 6. Secondary tabs under Channels – PAGE_
SEL 1 .............................................................. 24
Tab. 7. Abbreviations ...................................................29
Figures
Fig. 1. PCA9959HN-ARD silkscreen (top view) ............5
Fig. 2. PCA9959HN-ARD board (top view) .................. 6
Fig. 3. PCA9959HN-ARD board (bottom view) ............ 6
Fig. 4. PCA9959HN-ARD block diagram ......................7
Fig. 5. Location of the 0 Ω resistors R278 to R281
on the MIMXRT1050-EVK board .....................10
Fig. 6. PCA9959HN-ARD daughter board and
MIMXRT1050-EVK board ................................13
Fig. 7. PCF85063AT-ARD daughter board /
MIMXRT1050-EVK board assembly ................14
Fig. 8. PCA9959HN-ARD daughter board and
LPCXpresso55S69 mother board ................... 15
Fig. 9. PCA9959HN-ARD daughter board /
LPCXpresso55S69 board assembly ................16
Fig. 10. PCA9959HN-ARD daughter board,
IMX8MMINI-IARD interposer board, and
8MMINILPD4-EVK board assembly ................ 17
Fig. 11. PCA9959HN-ARD daughter board /
8MMINILPD4-EVK board operation ................ 18
Fig. 12. Graphical user interface — Settings tab
activated .......................................................... 19
Fig. 13. Graphical interface – Global tab activated .......21
Fig. 14. Graphical interface – Global / Page Select
tab activated ....................................................21
Fig. 15. Graphical interface – Global / Gradation tab
activated .......................................................... 22
Fig. 16. Graphical interface – Global / Side tab
activated .......................................................... 22
Fig. 17. Graphical interface – Channels / Errors tab
activated .......................................................... 23
Fig. 18. Graphical interface – Channels / Grid tab
activated .......................................................... 24
Fig. 19. Graphical interface – Channels / Group
Config tab activated ........................................ 25
Fig. 20. Graphical interface – Channels / Preset
Current 1 tab activated ....................................26
Fig. 21. Graphical interface – Channels / Preset
Current 2 tab activated ....................................27
Fig. 22. Graphical interface – Channels / Preset
Current 3 tab activated ....................................28
UM11623 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved.
User manual Rev. 1 — 21 May 2021
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