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NXP Semiconductors
UM11763
PCA9617ADP-ARD user manual
Figure 3. PCA9617ADP-ARD – LDO1 (up) and LDO2 (down) section
The enable input for both LDOs (U3 and U4) are controlled through an interlock
loop circuit. Both regulators are disabled when “LDO_EN” are pulled down. This is
accomplished when LDO1 switch (U1) is “2Z/2Y3 – ON” and LDO2 switch (U2) is
“2Z/2Y0 – ON”. This combination is true for VCCA = 4.96 V, and VCCB = 2.5 V. The
onboard LED D3 indicates the LDO enable status.
4.7 Jumpers and test points
The board contains eight jumpers and several test points.
and
the jumper locations and their default configurations.
located on the PCA9617ADP-ARD board.
Ref Des
Label
Default
Description
1-2: VCCA = VCC_LDOOUT1
J19
VCCA
1-2
OFF: VCCA FROM EXTERNAL
1-2: VCCB = VCC_LDOOUT2
J20
VCCB
1-2
OFF: VCCB FROM EXTERNAL
1-2/3-4: ON
J18
Side A (U6)
1-2/3-4: ON
1-2/3-4: OFF
Table 4. PCA9617ADP-ARD jumpers
UM11763
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© 2022 NXP B.V. All rights reserved.
User manual
Rev. 1.0 — 22 July 2022
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