Interfacing with the MMC/SD Module
Setup and Use of the Multimedia Card/Secure Digital Host Controller Application Note, Rev. 0
Freescale Semiconductor
7
different card applications. The resulting clock is used throughout the module.
Figure 1
illustrates the
clock controller module.
Figure 1. i.MX1/L Clock Controller Module (MMC/SD uses PERCLK2 Signal)
To set the clock controller to desire frequency, you must configure the clock controller register: CSCR,
PCDR, MPCTL0, MPCTL1, SPCTL0, and SPCTL1.
Example 2
is a code sample to configure the clock
with an output frequency of 406.25 kHz. For the i.MX21 there is an extra gate used for each peripheral
clock to conserve power when other peripherals are not in use. The extra gate is not shown in the code
example.
Example 2. Clock Controller Initialization for i.MX1/L
//----------------------------- Set up premultiplier PLL ------------------------------//
/* CLKO_SEL[31:29] = HCLK (CLKO pin)
* USB_DIV[28:26] = 000
* SD_CNT[25:24 = 00
* SPLL_RESTART[22] = RESTARTS SYSTEM PLL AT NEW FREQUENCY (0)
* MPLL_RESTART[21] = RESTARTS MCU PLL AT NEW FREQUENCY (0)
* CLK16_SEL[18] = 0
* OSC_EN[17] = 0
* SYSTEM_SEL[16] = CLOCK SOURCE IS THE INTERNAL PREMULTIPLIER
* PRESC[15] = PRESCALER DIVIDES BY 2
* BLCK_DIV[13:10] = SYSTEM PLLCLK DIVIDED BY 1
* SPEN[1] = SYSTEM PLL ENABLED
* MPEN[0] = MCU PLL ENABLED
*/