Interfacing with the MMC/SD Module
Setup and Use of the Multimedia Card/Secure Digital Host Controller Application Note, Rev. 0
Freescale Semiconductor
5
// GPCR |= 0x00000400; // DS_SLOW = 26 MHz / 30 pF
// GPCR |= 0x00000800; // DS_SLOW = 26 MHz / 45 pF
// GPCR |= 0x00000C00; // DS_SLOW = 26 MHz / greater than 45 pF
/*****************************************/
/* Include the AIPI Module Configuration */
/*****************************************/
PSR0_2 &= ~0x00000010;
PSR1_2 |= 0x00000010;
PAR_2 |= 0x00000010;
}
Notice in the code sample that the last five registers are included within the pin configuration. The DDIR
register for the i.MX1/L is set to 0x00003F00 to enable the SDHC ports to output. Because the i.MX21
can have two SDHC ports, set both PTB_DDIR and PTE_DDIR registers to 0x000003F0 and
0x00FC0000 respectively. The GPCR is the peripheral control register which is used to control the
driving strength. When using the MMC/SD module the driving strength must be set to 15 pF; otherwise
overshoot and ringing problems can occur on the SD_CLK. Setting the driving strength on the i.MX21 is
explained in the driving strength section of reference [6]. The next three registers (PSR0_2, PSR1_2, and
PAR_2) are used to allow the IP bus peripheral to send 32 bits and whether it can be accessed in user
mode.
4
Interfacing with the MMC/SD Module
This section describes the different functional aspects of the MMC/SD module.
4.1
Card Identification Modes
The MMC/SD module is in identification mode after reset and during the search for new cards on the bus.
During the identification mode, the MMC/SD module performs the following steps which are explained
in more detail in the next sections:
1. Detects the cards
2. Resets all cards that are in the card identification state
3. Validates operation voltage range
4. Identifies the cards
5. Asks each card (separately, on its own SD_CMD line) to publish its relative card address (RCA)
4.1.1
Card Detect
Card detection occurs automatically through the SD_DAT [3] pin. Only the SD card has this feature
because the MMC does not have the SD_DAT [3] pin. The detection circuitry is sampled by the i.MX
system clock (HCLK) so the state of the MMC/SD module does not matter. After the card is detected, the
user must mask the card detection interrupt (INT_MASK |= 0x40) to avoid misleading interrupt
generation during card access as the SD_DAT lines change.