NXP Semiconductors i.MX RT685, Руководство пользователя, Страница: 9 / 31

Table 2. Indicators and jumpers (continued)
Circuit ref (Rev E) Description Default Reference
Target SWD is connected to either the
on-board Link2 Debug Probe or an
external Debug Probe.
Jumper shunted, the i.MX RT685
Target SWD interface is disabled. Use
this setting only when the on-board
Link2 Debug Probe is used to debug
an off-board target MCU.
JP4
When open (default), the Bridge UART
and SPI connections from the Link2
probe are driven to the i.MX RT685
target.
Install JP4 when using the SPI
interface at connector J36 and/or FC0
UART at J16. Note that this disables
the Link2 SPI and UART (VCOM/
bridge) connections.
Open Schematic
JP6
Interrupt source select for audio
devices, controlling which audio
device drives the interrupt to i.MX
RT685 Port 0 pin 0. Insert in position
1-2 for the audio codec or 2-3 for the
TFA9894 amplifiers.
2-3 (digital amplifiers)
Audio Codec and Audio digital
amplifiers
JP7, JP8
I2S data select for audio devices,
controlling which audio device drives
the I2S connections to the i.MX
RT685 I2S port. Insert in position 1-2
for the audio codec or 2-3 for the
TFA9894 amplifiers. i.MX RT685
PIO0_9
used for data transmit and
PIO0_23
for data receive.
2-3 (digital amplifiers)
Audio Codec and Audio digital
amplifiers
JP9, JP10
ADC reference connector
This header provides an access point
to inject positive and negative voltage
references for the i.MX RT685 ADC.
An external positive reference may be
connected to JP10 pin 2.
An external negative reference may be
connected to JP9 pin 1.
Open
MIMXRT685-EVK ADC
references and inputs
JP11
Selection jumper for digital amplifier
+5V supply. Install in position 1-2 to
draw digital amplifier supply from J6
(Rev E) power connector, or in
1-2 Schematic
Table continues on the next page...
NXP Semiconductors
Board layout and settings
i.MX RT685 Evaluation Board, Rev. 0, March 20 2020
User's Guide 9 / 31