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TWRMCF51JGUM
TWR-MCF51JG Tower Module User's Manual
Page 15 of 21
Table 4.
General Purpose TWRPI socket pinout
Left-side 2x10 Connector
Right-side 2x10 Connector
Pin
Description
1
5V VCC
2
3.3 V VCC
3
GND
4
3.3V VDDA
5
VSS (Analog GND)
6
VSS (Analog GND)
7
VSS (Analog GND)
8
ADC: Analog 0
9
ADC: Analog 1
10
VSS (Analog GND)
11
VSS (Analog GND)
12
ADC: Analog 2
13
VSS (Analog GND)
14
VSS (Analog GND)
15
GND
16
GND
17
ADC: TWRPI ID 0
18
ADC: TWRPI ID 1
19
GND
20
Reset
Pin
Description
1
GND
2
GND
3
I2C: SCL
4
I2C: SDA
5
GND
6
GND
7
GND
8
GND
9
SPI: MISO
10
SPI: MOSI
11
SPI: SS
12
SPI: CLK
13
GND
14
GND
15
GPIO: GPIO0/IRQ
16
GPIO: GPIO1/IRQ
17
GPIO: GPIO2
18
GPIO: GPIO3
19
GPIO: GPIO4/Timer
20
GPIO: GPIO5/Timer
2.8
USB
The MCF51JG features a USB full-speed/low-speed OTG/Host/Device controller with built-in
transceiver. The TWR-MCF51JG routes the USB D+ and D- signals from the MCF51JG MCU to either the
on-board USB connector (
J8
) or the Tower Primary Connector (allowing the connection to external USB
connectors or additional circuitry on a Tower peripheral module) depending on the value of four
optional resistors: R11/R12 and R13/R14. By default, R11 and R12 are not populated and R13 and R14
are. This connects the MCF51JG USB signals to the on-board USB circuit.
A power supply switch with an enable input signal and over-current flag output signal is used to supply
power to the USB connector when the MCF51JG is operating in host mode. Port pin PTA2 is connected
to the flag output signal and port pin PTA1 is used to drive the enable signal. Both port pins can be
isolated with jumpers if needed.