TWRMCF51JGUM
TWR-MCF51JG Tower Module User's Manual
Page 13 of 21
2.4
Debug Interface
There are two debug interface options provided: the on-board OSBDM circuit and an external
Background Debug Mode (BDM) connector. The BDM connector is a standard 6-pin connector
providing an external debugger cable with access to the BDM interface of the MCF51JG256.
Alternatively, the on-board OSBDM debug interface can be used to access the debug interface of the
MCF51JG256.
Note: When using an external debug pod to connect to the MCF51JG, be sure to connect the BDM
cable to
J17
(JG BDM). Avoid connecting to
J18
(JM60 BDM) which is directly next to
J17
.
J18
provides
a debug connection to the OSBDM MCU (MC9S08JM60).
2.4.1
OSBDM
An on-board MC9S08JM60 based Open Source BDM (OSBDM) circuit provides a BDM debug interface
to the MCF51JG. A standard USB A male to mini-B male cable (provided) can be used for debugging via
the USB connector,
J14
. The OSBDM interface also provides a USB to serial bridge. Drivers for the
OSBDM interface are provided in the
P&E Micro OSBDM/OSJTAG Tower Toolkit
(available on the
MCF51JG product website). These drivers and more utilities can be found online at
2.5
Accelerometer
An MMA8451Q digital accelerometer is connected to the MCF51JG MCU through an I2C interface
(I
2
C0: PTB2 and PTB3) and two GPIO/IRQ signals (PTC4 and PTC5).
Figure 6.
Accelerometer Circuit