Power supply sequence
A3M36SL039 Airfast Power Amplifier Module with Autobias Control, Rev. 0, December 2021
Data Sheet: Technical Data
10
/
33
Table 11. Register overview and bit description
(continued)
Address
Register
Name
Bit
Bit Descriptions
Power
On/Reset
Value
1
Overwritten
by OTP
Attribute
EM
Mode
4
B_Sense_DAC 6–7 Not available
N/A
N/A
N/A
No
0–5 Sense DAC B 6-bit logic value for
peaking amplifiers. DAC B sets the
reference voltage to compare to the
V
DS
across the reference device.
Minimum typical value is 6'b001000
and maximum value is 6'b111111.
Recommendation is that the value in
this register be set higher than
6'b010000.
6'h20
Yes
RW
2
Yes
5
B_VGS3_DAC 0–7 Sets 8-bit DAC logic value for
peaking driver stage. 8'h00 sets gate
to equal ceiling voltage. 8'hFF
reduces gate voltage by a max
value.
8'h80
6
B_VGS4_DAC 0–7 Sets 8-bit DAC logic value for
peaking final stage. 8'h00 sets gate
to equal ceiling voltage. 8'hFF
reduces gate voltage by a max
value.
8'h80
7–14
Reserved
N/A Not available
N/A
N/A
N/A
No
15
Temp_ADC
0–7 Temperature sensor 8-bit DAC
value. 8'h00 is lowest temperature,
8'hFF is highest temperature.
8'h00
No
R
No
16
Reserved
N/A Not available
N/A
N/A
N/A
No
17
EM_Passcode 0–7 Engineering Mode (EM). By writing
8'hE3 to this register the user can
enter engineering mode. EM can be
cleared by writing any other code to
this register. In EM registers
identified in EM mode column can be
changed.
N/A
No
W
Yes
1. At power on or reset, OTP values set by NXP are automatically loaded into registers indicated with a “Yes” in the
“Overwritten by OTP” column. For these registers, values shown in the “Power On/Reset Value column” will be loaded
only if OTP has not been programmed to prevent damage to the device.
2. Register can be read at any time. Can write to register only when in Engineering Mode (EM).
4 Power supply sequence
Power Up Sequence
1. V
CC
_+5V: 5 V power up
2. SPI/I
2
C interface is active
3. V
DP1
,V
DP2
,V
DC1
,V
DC2
power up
