56F8013 Demonstration Board User Guide, Rev. 0
Appendix A-2
Freescale Semiconductor
Preliminary
Figure
A
-1
. MC56
F
80
13
PROCES
S
OR
A
A
B
B
C
C
D
D
E
E
4
4
3
3
2
2
1
1
Single trace
to GNDA
JTAG Connector
/TRST
DSCO De
s
ig
n
MC56F8013
P
ro
c
e
s
s
o
r
MC56F8013DE
M
O
.D
S
N
1.0
15
Wednes
day
, D
ec
em
ber 08, 2004
A
D
ig
ital Signal Controller Operation
2100 Eas
t Elliot R
oad
Tem
pe, Ariz
ona 85284
Tit
le
D
o
cument
Date
:
Size
D
e
s
igner:
S
heet
o
f
Rev.
Numbe
r
(512) 895-7215 FAX: (480) 413-2510
ANA_0
ANA_1
ANA_2
ANB
_0
ANB
_1
ANB
_2
TD
O
/R
ESET
/D
E
/D
E
TD
I
TD
O
TC
K
TMS
GNDA
GND
GND
GND
ANA_0
ANA_1
ANA_2
ANB
_0
ANB
_1
ANB
_2
TMS
GND
TC
K
/R
ESET
PA3
PA2
PA1
PB1
PA0
PB2
PB4
PB5
PB7
PA5
PA6
PA4
PB0
PB3
PB6
ANA0
ANA1
ANA2
ANB
0
ANB
1
ANB
2
TD
O
TD
I
TC
K
TMS
+3
.3
VA
+3
.3
VA
+3
.3
V
+3
.3
V
+3
.3
V
+3
.3
V
C16
100pF
C1
2.
2uF
C15
0.
001uF
C4
0.
1uF
C17
0.
0022uF
C18
0.
0022uF
C19
0.
0022uF
R1
100
R2
100
R3
100
R5
100
R4
100
C22
0.
0022uF
C20
0.
0022uF
R6
100
C21
0.
0022uF
L2
FE
R
R
ITE
B
E
AD
C14
0.
01uF
R20
10K
L1
FE
R
R
ITE
B
E
AD
KEY
J1
1
3
5
7
9
11
13
2
4
6
10
12
14
R18
47K
DNP
U1
M
C
56F8013V
F
AE
17
12
11
10
5
6
9
19
4
16
7
8
27
13
20
18
22
32
30
14
1
3
24
23
29
28
21
2
25
26
31
15
PB2
/MI
S
O
/T
2
AN
A0
/PC
0
AN
A1
/PC
1
AN
A2
/VR
EF
H
/PC
2
AN
B
0
/PC
4
AN
B
1
/PC
5
VSSA_
AD
C
PB4
/T
0
/C
L
KO
P
B
5
/T
1/
FAU
L
T3
PB3
/MO
S
I/
T
3
AN
B
2
/VR
EF
L
/PC
6
V
DDA_ADC
VSS_
IO
1
VSS_
IO
0
PA5
/PW
M5
/F
AU
L
T
2
/T
3
P
A6/
FAU
L
T0
PA4
/PW
M4
/F
AU
L
T
1
/T
2
TD
O/
P
D
1
TD
I/
P
D
0
T
C
K/PD
2
PB6
/R
XD
/SD
A/C
L
K
IN
PB7
/T
XD
/SC
L
PA3
/PW
M3
PA2
/PW
M2
PA0
/PW
M0
PA1
/PW
M1
PB0
/SC
L
K/SC
L
PB1
/SS/SD
A
VC
AP1
V
DD_I
O
T
M
S/PD
3
R
ESET
/PA7
/VPP
C5
0.
1uF
R19
47K
R21
10K
DNP
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