NXP Semiconductors 56F8013, Руководство пользователя

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Power Supply
Technical Summary, Rev. 0
Freescale Semiconductor 2-5
Preliminary
Figure 2-2. Schematic Diagram of the User Interrupt Interface
2.6 Reset
Logic is provided on the 56F8013 to generate an internal Power-On RESET. Additional reset
logic is provided to support the RESET signal from the JTAG connector and the user RESET
push-button, S3; refer to the schematics in
Appendix A .
2.7 Power Supply
The main power input to the 56F8013 Demonstration Board, +9V DC at 450mA, is through a
2.1mm coax power jack, P1. This input power passes through a reverse power-blocking diode to
provide a DC supply input for the +3.3V voltage regulator, U3. A 450mA power supply is
provided with the 56F8013 Demonstration Board; however, less than 200mA is required by the
Demo Board. The remaining current is available for custom control applications when connected
to the daughter card connector. The 56F8013 Demonstration Board pr3.3V DC voltage
regulation for the processor, ADC, JTAG interface and supporting logic; refer to schematics in
Appendix A
. Additional voltage regulation logic provides a low-noise +3.3V DC voltage to the
processor’s A/D peripheral. Power applied to the 56F8013 Demonstration Board is indicated
with a Power-ON LED, referenced as LED7.
56F8013
GPIOB2
GPIOB3
+3.3V
+3.3V
10K
10K
S1
S2
0.1µF
0.1µF
GPIOB4
GPIOB5
JP3
1
3
JP4
1
3
2
2