Miscellaneous Interfaces
Jetson AGX Xavier Series Product
DG-09840-001_v2.5 | 110
13.3
UART
Jetson AGX Xavier brings five UARTs out to the main connector. See Figure 13-7 for typical
assignments of the UARTs.
Table 13-10. Jetson AGX Xavier UART Pin Description
Pin # Module Pin Name SoC Signal
Usage/Description
Usage on NVIDIA
Carrier Board
Direction
Pin Type
K54
UART1_RX
UART1_RX
UART 1 Receive
Expansion Connector via
level shifter
Input
CMOS – 1.8V
K53
UART1_TX
UART1_TX
UART 1 Transmit
Output
H54
UART1_CTS
UART1_CTS
UART 1 Clear to Send
Input
L51
UART1_RTS
UART1_RTS
UART 1 Request to Send
Output
C56
UART2_RX
UART2_RX
UART 2 Receive
UART-USB (MicroB)
Bridge
Input
C58
UART2_TX
UART2_TX
UART 2 Transmit
Output
A57
UART2_CTS
UART2_CTS
UART 2 Clear to Send
Input
G58
UART2_RTS
UART2_RTS
UART 2 Request to Send
Output
K60
UART3_RX_DEBUG
UART3_RX
Debug UART Receive
Input
H62
UART3_TX_DEBUG
UART3_TX
Debug UART Transmit
Output
H58
UART5_RX
UART5_RX
UART 5 Receive
M.2 Key E Connector
Input
J58
UART5_TX
UART5_TX
UART 5 Transmit
Output
H57
UART5_CTS
UART5_CTS
UART 5 Clear to Send
Input
K58
UART5_RTS
UART5_RTS
UART 5 Request to Send
Output
E61
SPI2_CLK (UART7_TX) SPI2_SCK
SPI 2 Clock or UART 7 Transmit
PCIe x16 Connector
Bidir
D60
SPI2_CS0_N
(UART7_CTS)
SPI2_CS0
SPI 2 Chip Select 0 or UART 7 Clear to
Send
Bidir
D62
SPI2_MISO
(UART7_RX)
SPI2_MISO
SPI 2 Master In / Slave Out or UART 7
Receive
Bidir
F60
SPI2_MOSI
(UART7_RTS)
SPI2_MOSI
SPI 2 Master Out / Slave In or UART 7
Return to Send
Bidir
Notes:
1.
In the Type/Dir column, Output is from Jetson AGX Xavier. Input is to Jetson AGX Xavier. Bidir is for Bidirectional signals.
2.
The direction indicated for the UART pins is true when used for that function. Otherwise, these pins support GPIO functionality and can support
both input and output (bidirectional).