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Registers Format
3.5 Mode and Interrupt Control Register
The Mode and Interrupt control register is a write-only register. This register
control the AD operating modes and the IRQ level of the ACL-8111. The AD
operation modes include the AD clock source and the AD data transfer
method.
Address: BASE + 11
Attribute:
write only
Data Format:
Bit
7
6
5
4
3
2
1
0
BASE+11 X IR2 IR1 IR0 X M2 M1 M0
Where M0, M1, and M2 are mode selection:
M2
M1
M0
Description
0
0
0
Software trigger with program polling
0
0
1 (No interrupt generated)
0
1
0
External trigger with program polling
0
1
1
External trigger with interrupt polling
(With End-of-conversion “EOC” interrupt)
1 0 0
Internal time pacer trigger and polling
(No interrupt generating)
1 0 1
Not
Used
1 1 0
Internal timer pacer trigger with interrupt data
transfer(With End-of-conversion “EOC” interrupt)
1
1
1
Not Used
Note
: The external trigger signal comes from the DI 0 (pin-1 of CN2).
Where IR0, IR1, and IR2 are interrupt IRQ level settings:
IR2
IR1
IR0
IRQ Level
0 0 0
IRQ2
0 0 1 Not
Used
0 1 0
IRQ2
0 1 1
IRQ3
1 0 0
IRQ4
1 0 1
IRQ5
1 1 0
IRQ6
1 1 1
IRQ7
