
NTAK20 Clock Controller daughterboard
Page 741 of 906
Circuit Card
Description and Installation
without software intervention. If both references are out of specification, the
clock controller provides holdover.
Autorecovery and chatter
If the command “track to primary” is given, the clock controller tracks to the
primary reference and continuously monitors the quality of both primary and
secondary references. If the primary goes out of specification, the clock
controller will automatically “track to secondary” if the secondary is within
specifications. On failure (both out of specification), the clock controller
enters the HOLDOVER mode and continuously monitors both references. An
automatic switchover is initiated to the reference that recovers first. If the
secondary recovers first, then the clock controller tracks to the secondary,
then switches over to the primary when the primary recovers. If the primary
recovers first, the clock controller tracks to the primary and continues to do
so even if the secondary recovers.
If the command “track to secondary” is given, the clock controller tracks to
the secondary reference and continuously monitors the quality of both
primary and secondary references. If the secondary goes out of specification,
the clock controller automatically tracks to primary provided that is within
specifications. On failure (both out of specification), the clock controller
enters the HOLDOVER mode and continuously monitors both references. An
automatic switchover is initiated to the reference that recovers first. If the
primary recovers first, the clock controller tracks to the primary, but switches
over to the secondary when the secondary recovers. If the secondary recovers
first, the clock controller tracks to the secondary even if the primary recovers.
To prevent chatter due to repeated automatic switching between primary and
secondary reference sources, a time-out mechanism of at least 10 seconds is
implemented.
Digital to analog converter
The Digital to Analog Converter (DAC) enables the microprocessor to track,
hold, and modify the error signal generated in the digital PLL.
The firmware uses the available memory on the clock controller to provide
error-burst detection and correction. Temporary holdover occurs in the
momentary absence of the reference clock.
Содержание Circuit Card
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Страница 4: ...Page 4 of 906 Revision history 553 3001 211 Standard 3 00 August 2005...
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Страница 78: ...Page 78 of 906 Overview 553 3001 211 Standard 3 00 August 2005...
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Страница 156: ...Page 156 of 906 Option settings 553 3001 211 Standard 3 00 August 2005...
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Страница 388: ...Page 388 of 906 NT6D71 UILC Line card 553 3001 211 Standard 3 00 August 2005...
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Страница 906: ...Page 906 of 906 Appendix A LAPB Data Link Control protocol 553 3001 211 Standard 3 00 August 2005...
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