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CCS Technical Documentation
Troubleshooting — BB
RH-44
Issue 1 04/2003
Nokia Corporation Confidential
Page 15
Figure 7: Waveform of 19.2MHz clock from RF to UPP
RFConvClk (19.2 MHz digital)
The UPP distributes the 19.2MHz internal clock to the DSP and MCU, where SW multi-
plies this clock by seven for the DSP and by two for the MCU. (See the following figure.)
Figure 8: RF CovClk waveform
CBUSClk Interface
A 1.2 MHz clock signal is use for CBUS, which is used by the MCU to transfer data
between UEM and UPP. (See the following figure for Cbus data transfer.)