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PAMS Technical Documentation
System Module
NSB-7
Issue 1 06/00
ã
Nokia Mobile Phones Ltd.
Page 37
Memories
MAD memory configuration
The MAD2WD1 used in NSB-7 contains 16 kWords RAM, and 80 kWords ROM memory.
Memory
The MCU program code resides in an external flash program memory, which size is
16Mbits (1024k x 16bit). The MCU work (data) memory size is 2048 kbits (256k x 16bit).
Flash and SRAM memory chips are packed in same combo memory package.
The BusController (BUSC) section in the MAD decodes the chip select signals for the
external memory devices and the system logic. BUSC controls internal and external bus
drivers and multiplexers connected to the MCU data bus. The MCU address space is
divided into access areas with separate chip select signals. BUSC supports a programma-
ble number of wait states for each memory range.
Program and Data Memory
The MCU program code resides in the program memory. The program memory is 16Mbits
(1024k x 16bit) Flash memory.
The flash memory has a power down pin that should be kept low, during the power up
phase of the flash to ensure that the device is powered up in the correct state, read only.
The power down pin is utilized in the system sleep mode by connecting the ExtSysResetX
to the flash power down pin to minimize the flash power consumption during the sleep.
Nonvolatile data memory is implemented with program (Flash) memory. Special EEPROM
emulation (EEEMmu) software is utilized.
Work Memory
The work memory is a static RAM of size
2096k (256k x 16). The memory contents are
lost when the baseband voltage is switched off. All retained data must be stored into the
data memory when the phone is powered down.
MCU Memory Requirements
MCU Memory Map
MAD2 supports maximum of 4GB internal and 4MB external address space. External
memories use address lines MCUAd0 to MCUAd21 and 8-bit/16-bit databus. The BUSC
bus controller supports 8- and 16-bit access for byte, double byte, word and double word
data. Access wait states (0, 1 or 2) and used databus width can be selected separately for
each memory block.
Device
Organisation
Access Time ns
Wait States Used
Remarks
FLASH
1024kx16
120
1
uBGA 48
SRAM
256kx16
120
1
uBGA 48
Содержание NSB-7 Series
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