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54
NDiS 127 User Manual
Appendix A: Watchdog Timer
a
PPendix
a: W
atChdog
t
imer
NDiS 127 features a watchdog timer that resets the CPU or generates
an interrupt if the processor stops operating for any reason. This
feature ensures system reliability in industrial standalone or unmanned
environments. The watchdog timer provides the following functions for
user programming:
• Timer can be set from 1 to 255 seconds or 1 to 255 minutes.
• Generates an interrupt or resets signal if the software fails to reset the
• Timer after time-out.
Before using Watch Dog Timer, it must enter Watch Dog Timer
programming mode first (STARTPROG). After the operation of the Watch
Dog Timer, it will need to exit the WDT (ENDPROG).
WDT program need to follow these steps:
1. Enter WDT programming mode
2. Set the mode of WDT ; Start the WDT ; ON / OFF WDT
3. Exit WDT programming mode
#define INDEXP 0x2e
#define DATAP 0x2f
//Super I/O Watchdog
#define STARTPROG {
outportb(INDEXP,0x87);
outportb(INDEXP,0x01);
outportb(INDEXP,0x55);
outportb(INDEXP,0x55);
}
#define ENDPROG{outportb(INDEXP,0x07);
outportb(DATAP,0x02);
outportb(INDEXP,0x02);
outportb(DATAP,0x02);
}
#define SELEDEV(x) { outportb(INDEXP,7); outportb(DATAP,x); }
#define WRITEREG(reg,val) {
Example Programs
Introduction