Copyright © 2013 NEXCOM International Co., Ltd. All Rights Reserved.
50
DNA 1150 User Manual
Appendix A: Bypass Register
Appendix A: Bypass Register
Register Map
The following tables are the Register Map for DNA 1150.
Bypass Timer Configuration Register
Offset 0xF2
7
6
5
4
3
2
1
0
R
X
X
X
X
R/W
Segment
Timer
Expired
Unused
Unused
Unused
Unused
Global Timeout Value
Power ON State Bypass Control Status Register
Offset 0xF3
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bypass Mode
Segment6
Segment5
Segment4
Segment3
Segment2
Segment1
Power OFF State Bypass Control Status Register
Offset 0xF7
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Unused
Unused
Segment6 Segment5 Segment4 Segment3 Segment2 Segment1
PCB and CPLD Release Version Register (LSB)
Offset 0xF1
7
6
5
4
3
2
1
0
R
R
PCB version (LSB)
CPLD release version (LSB)
