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temporal noise reduction (TNR)
-
1D - 2D image filtering
o
Canny Edge Filter
o
Full Programmable 5x5 Filter Kernel
Many different filters can be programmed in to the FPGA. NET is offering a filter programming template
on request to help the customer to build his own filter kernel.
Processing Capabilities
In most cases the hardware characteristics of an FPGA applied in a camera limit the application
possibilities of the camera. To address this issue NET offers three size and performance options of the
GigEPRO internal FPGA (see
Table 15:
) and three size options of the GigEPRO internal DDR3 memory
(see
Table 16:
), and thus brings the image processing capabilities of the camera to a new level in the
field of industrial camera computing.
The base function for the GigE Vision functionality occupies only a fraction of the FPGA. The remaining
part is available for customized image processing tasks. The table below lists the available resources in
each FPGA type available for customer image processing (assuming that a FPGA can utilize up to 75% of
its overall resources).
Figure 28:
Image processing capability of GigEPRO internal FPGA
Table 15:
FPGA resources (XILINX) available to customer image processing*
* estimated, final results may differ
Device
Logic Cells FFs
DSP
RAM Block
RAM Mbits
XC6SLX45
20.000
24.500
39
40
716
XC6SLX75
43.500
53.500
95
82
1.472
XC6SLX100
63.500
78.500
131
154
2.768