NEC uPD75P308, Техническое описание

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µ
PD75P308
7
1.3 PIN INPUT/OUTPUT CIRCUITS
The following shows a simplified input/output circuit diagram for each pin of the
µ
PD75P308.
TYPE A (for TYPE E–B)
TYPE D (for TYPE E–B, F-A)
TYPE B TYPE E–B
IN
V
DD
P–ch
N–ch
Input buffer of CMOS standard
data
output
disable
OUT
P–ch
N–ch
Push–pull output that can be set in a output
high–impedance state (both P–ch and N–ch are off)
IN
Schmitt trigger input with hysteresis characteristics
data
output
disable
Type D
Type A
P.U.R.
enable
V
DD
P.U.R.
P–ch
IN/OUT
P.U.R. : Pull–Up Resistor
P.U.R.
enable
V
DD
P.U.R.
P–ch
TYPE B–C
TYPE E–E
IN
P.U.R. : Pull–Up Resistor
P.U.R. : Pull–Up Resistor
Schmitt trigger input with hysteresis characteristics
data
output
disable
Type A
P.U.R.
enable
V
DD
P.U.R.
P–ch
IN/OUT
Type B
Type D