NEC mPD780852 Series, Предварительное руководство пользователя

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CHAPTER 14 SERIAL INTERFACE SIO2
Preliminary User’s Manual U14581EJ3V0UM00
14.2 Serial Interface Configuration
The serial interface SIO2 consists of the following hardware.
Table 14-1. Serial Interface SIO2 Configuration
Item Configuration
Registers Serial I/O shift register 2 (SIO2)
Serial receive data buffer register (SIRB2)
Control registers Serial operation mode register 2 (CSIM2)
Serial receive data buffer status register (SRBS2)
Port mode register 0 (PM0)
(1) Serial I/O shift register 2 (SIO2)
This is an 8-bit register that performs parallel-serial conversion and serial transmit/receive (shift operations) in
synchronization with the serial clock.
SIO2 is set with an 8-bit memory manipulation instruction.
A transmit/receive operation is started by writing or reading data to or from SIO2 when bit 7 (CSIE2) of the serial
operation mode register 2 (CSIM2) is 1.
When the received data is completely stored in SIO2, if SDVA (bit 1 of the receive data buffer status register
(SRBS2)) is 0, the contents of SIO2 are immediately transferred to the receive data buffer register (SIRB2). If
SDVA is 1, the received data is held in SIO2.
RESET input clears SIO2 to 00H.
Cautions 1. Do not access (read/write) SIO2 during a transmit/receive operation (shift operation).
2. When a transmit/receive operation starts (writing to SIO2), do not access (read/write)
SIO2 before a transmit completion interrupt (INTCSI2) occurs in the transmit/receive
mode (MODE2 = 1).
3. If the external clock mode (CLPH = 1) is selected in the slave mode (SCL20 = 0, SCL21
= 0), do not read the data of SIO2 directly. The value of SIO2 may not coincide with the
value transferred to SIRB2. To obtain the accurate value, read the data of SIRB2.
(2) Serial receive data buffer register (SIRB2)
This is an 8-bit register that stores the data transferred from the serial I/O shift register 2 (SIO2).
The contents of SIO2 are immediately transferred to SIRB2 when SDVA (bit 1 of the receive data buffer status
register (SRBS2)) = 0. When SDVA = 1, the contents of SIO2 are not transferred to SIRB2, and the receive
data is held by SIO2.
The status of SIRB2 can be checked by using the serial receive data buffer status register (SRBS2). If an overflow
occurs, the value of SIRB2 does not change after SRBS2 has been read, until transfer of the new data has been
completed.
SIRB2 can be read with an 8-bit memory manipulation instruction. It cannot be written to.
RESET input makes SIRB2 to undefined.