NEC 78K0S/K 1+ Series, Примечание к применению

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CHAPTER 4 SETTING METHODS
[Example 1] f
CPU
= f
XP
= f
X
/4
(This is the same as in the sample program setting. In this sample program, “high-speed internal
oscillation clock (8 MHz (TYP.))” is selected as the system clock (f
X
) by the option byte setting, so the
CPU clock frequency (f
CPU
) and peripheral hardware clock frequency (f
XP
) are 2 MHz (= 8 MHz/4).)
PPCC
MOV PPCC, #00000010B
MOV PCC, #00000000B
PPCC = 0b00000010;
PCC = 0b00000000;
Remark f
X
: System clock frequency
The system clock to be used is set using the option byte. For details, refer to 4.1 Option Byte Setting .
The PPCC register setting value is “000000 10 (bits 2 to 7 must be set to 0)” and the PCC register setting value is
“000000 0 0 (bits 0 and 2 to 7 must be set to 0)”.
For standard products and (A)-grade products, the detection voltage (V
POC
) of the power-on-clear (POC) circuit is
2.1 V
±
0.1 V. To satisfy the condition of “power supply voltage
≥
2.0 V” (setting condition of the CPU clock
frequency in this sample program) at the point POC is released, the CPU operates normally when this sample
program operates. This is same with (A2)-grade products.
• Assembly language
• C language
0 0 0 0 0 0 1 0
PCC
0 0 0 0 0 0 0 0
PPCC1 PPCC0 PCC1 CPU Clock
Frequency
(f
CPU
)
Peripheral
Hardware Clock
Frequency (f
XP
)
1 0 0 f
X
/4 f
X
/4
Application Note U18752EJ2V0AN
18