National Semiconductor LM4985 Скачать руководство пользователя страница 12

Appendix D Micro SMD Wafer
Level Chip Scale Package, PCB,
Layout, and Mounting
Considerations

Refer to Application Notes ( AN-1112) for more information
on Micro SMD Wafer Level Chip Scale Package.

Since National Semiconductor is constantly pursuing the
best package performance possible, please refer to the fol-
lowing web page for possible updates to the µSMD package
information

presented

in

Appendix

D:

<

http://

www.national.com/an/AN/AN-1112.pdf.

Appendix E Maximizing OCL Mode
Channel-to-Channel Separation

The OCL mode AC ground return (CNT_GND pin) is shared
by both amplifiers. As such, any resistance between the

CNT_GND pin and the load will create a voltage divider with
respect to the load resistance. In a typical circuit, the amount
of CNT_GND resistance can be very small, but still signifi-
cant. It is significant because of the relatively low load im-
pedances for which the LM4985 was designed to drive: 16

to 32

. The ratio of this voltage divider will determine the

magnitude of any residual signal present at the CNT_GND
pin. It is this residual signal that leads to channel-to-channel
separation (crosstalk) degradation.

For example, for a 60dB channel-to-channel separation
while driving a 16

load, the resistance between the

LM4985’s CNT_GND pin and the load must be less than
16m

. This is achieved by ensuring that the trace that

connects the CNT_GND pin to the headphone jack sleeve
should be as short and massive as possible, given the
physical constraints of any specific printed circuit board lay-
out and design.

AN-1452

www.national.com

12

Содержание LM4985

Страница 1: ... audio signal to jumpers JP3 and JP5 Apply the source s signal and ground to the pin and the pin respectively Connect a load 16Ω to JP4 and another load to JP6 JP4 s pin and JP6 s pin carries the output signals from the two amplifiers found on pins OUT1 and OUT2 respec tively Apply power Make measurements Plug in a pair of head phones Enjoy Introduction To help the user investigate and evaluate th...

Страница 2: ... on either input to appear on either amplifier output and separate shutdown controls for each stereo channel The LM4985 features a shutdown mode for micropower dissipation an internal thermal shutdown protection mecha nism and is unity gain stable Operating Conditions Temperature Range 40 C TA 85 C Amplifier Power Supply Voltage 2 3V VDD 5 0V Board Features The LM4985 demonstration board has all o...

Страница 3: ...on to the amplifier s input B labeled as the right input on the demonstration board Apply an external signal source s positive voltage to the JP5 pin labeled and the signal source s ground reference to the pin labeled JP6 This is the connection to the amplifier s output B labeled as the right output on the demonstration board Connect the JP6 pin labeled to the positive input of an external signal ...

Страница 4: ... It is controlled using the slider located at the top of the program s window Each time the slider is moved from one tick mark to another the pro gram updates the amplifier s volume control The CHANNEL SHUTDOWN CONTROL has four radio but tons From left to right the first button controls the shutdown function of both amplifiers When selected both amplifiers are placed in shutdown mode The middle pa...

Страница 5: ...PCB Layout Guidelines This section provides general practical guidelines for PCB layouts that use various power and ground traces Designers should note that these are only rule of thumb recommen dations and the actual results are predicated on the final layout POWER AND GROUND CIRCUITS Star trace routing techniques returning individual traces back to a central point rather than daisy chaining trac...

Страница 6: ...d Figure 4 is the silkscreen that shows parts location Figure 5 is the top layer Figure 6 is the upper inner layer Figure 7 is the bottom layer The lower middle layer was not routed in this PCB layout 20184906 Figure 4 Top Silkscreen Shown 2 6X actual size 20184903 Figure 5 Top Layer Shown 2 6X actual size AN 1452 www national com 6 ...

Страница 7: ...Demonstration Board PCB Layout Continued 20184904 Figure 6 Upper Middle Layer Shown 2 6X actual size 20184905 Figure 7 Bottom Layer Shown 2 6X actual size AN 1452 www national com 7 ...

Страница 8: ...16Ω fIN 1kHz at from left to right at 1 THD N VDD 2 5V VDD 3 6V VDD 5 0V Figure 8 C CUPL mode THD N vs Output Power 20184935 RL 32Ω fIN 1kHz at from left to right at 1 THD N VDD 2 5V VDD 3 6V VDD 5 0V Figure 9 C CUPL mode THD N vs Output Power 20184928 RL 16Ω fIN 1kHz at from top to bottom at 1kHz VDD 2 5V POUT 20mW VDD 3 6V POUT 50mW VDD 5 0V POUT 50mW Figure 10 C CUPL mode THD N vs Frequency 201...

Страница 9: ... 16Ω fIN 1kHz at from left to right at 1 THD N VDD 2 5V VDD 3 6V VDD 5 0V Figure 12 OCL mode THD N vs Output Power 20184939 RL 32Ω fIN 1kHz at from left to right at 1 THD N VDD 2 5V VDD 3 6V VDD 5 0V Figure 13 OCL mode THD N vs Output Power 20184936 RL 16Ω fIN 1kHz at from top to bottom at 2kHz VDD 2 5V POUT 20mW VDD 3 6V POUT 35mW VDD 5 0V POUT 110mW Figure 14 OCL mode THD N vs Frequency 20184937...

Страница 10: ... and write the mode control register 0 0 0 0 0 0 0 1 Read and write the volume control register Mode Control Register D7 D6 D5 D4 D3 D2 D1 D0 WT1 WT0 PHG SDCH1 SDCH2 CHSEL1 CHSEL2 0 X X X X X X X D7 must always be set to 0 0 0 X X X X X Wake up time 80ms OCL 250ms C CUPL 0 1 X X X X X Wake up time 110ms OCL 450ms C CUPL 1 0 X X X X X Wake up time 170ms OCL 850ms C CUPL 1 1 X X X X X Wake up time 2...

Страница 11: ... control settings Table C1 Binary Values for the Different Volume Control Gain Settings Gain B4 B3 B2 B1 B0 18 1 1 1 1 1 17 1 1 1 1 0 16 1 1 1 0 1 15 1 1 1 0 0 14 1 1 0 1 1 13 1 1 0 1 0 12 1 1 0 0 1 10 1 1 0 0 0 8 1 0 1 1 1 6 1 0 1 1 0 4 1 0 1 0 1 2 1 0 1 0 0 0 1 0 0 1 1 2 1 0 0 1 0 4 1 0 0 0 1 6 1 0 0 0 0 8 0 1 1 1 1 10 0 1 1 1 0 12 0 1 1 0 1 14 0 1 1 0 0 16 0 1 0 1 1 18 0 1 0 1 0 21 0 1 0 0 1 24...

Страница 12: ...ect to the load resistance In a typical circuit the amount of CNT_GND resistance can be very small but still signifi cant It is significant because of the relatively low load im pedances for which the LM4985 was designed to drive 16Ω to 32Ω The ratio of this voltage divider will determine the magnitude of any residual signal present at the CNT_GND pin It is this residual signal that leads to chann...

Страница 13: ...t in a significant injury to the user 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness BANNED SUBSTANCE COMPLIANCE National Semiconductor follows the provisions of the Product Stewardship Guide for Customers CSP 9 111C2 and...

Отзывы: