National Semiconductor ADC14071, Инструкция по эксплуатации

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1.0 Introduction
opposite to their default positions. To use the
transformer T1, place jumpers JP1, JP2 and JP3 to
their default positions. When using the transformer,
the signal level at BNC J1 should be about 2Vp-p.
The ADC14071EVAL Design Kit (consisting of the
ADC14071 Evaluation Board, National's WaveVision
software and this manual) is designed to ease evaluation
and design-in of National's ADC14071 14-bit, 7MSPS
Analog-to-Digital Converter.
11. Adjust the signal level so that LEDs D34 and D4 are
not on.
12. With the WaveVision software, select the parallel port
(under the Options menu) that is to be used.
With the WaveVision software operating under Microsoft
Windows 3.1 or later, the signal at the Analog Input is
digitized and can be captured and displayed on the
computer monitor as a dynamic waveform. The digitized
output is also available at a pair of headers, HDR1 and
HDR2, for easy connection with ribbon cables.
13. Capture data by pressing
CTRL
-X.
14. Perform an FFT on the data that was acquired by
pressing
CTRL
-F.
Note that earlier versions of the ADC16061 software may be
used with the ADC14071 evaluation board. However, the
following exceptions/changes should be noted. The default
oscillator divider (Board to ADC Clock Ratio) shown when
CTRL
+P is pressed is "8", which really causes a divide by 4
for tha ADC14071 board. So with a 14.31818MHz crystal in
place, the ADC clock frequency would be 3.579545MHz.
The divide by ratio should be changed to "4", which will yield
a divider of 2 and an ADC clock frequency of 7.15909MHz.
When performing an FFT on the captured waveform, it will
be necessary to change the indicated Sampling Rate for the
data if the horizontal axis of the display is changed to
frequency. You can make this change by double clicking the
left mouse button with the cursor over the FFT display.
The software can perform an FFT on the captured data
upon command and display a spectral plot. This spectral
plot also shows dynamic performance in the form of SNR,
SINAD, THD and SFDR.
Both a socketed transformer and an op-amp-based single-
ended to differential conversion circuit are available with
jumpers to select which is used. A prototype area is
available for building customized input conditioning circuitry.
The on-board clock oscillator is stated as being 14MHz in
this manual, but the popular 14.31818MHz crystal is quite
acceptable and provided with the assembled board.
Because this board uses software that is also used for the
2.5 MSPS ADC16061, you will see references in this manual
to the ADC16061.EXE software. For the ADC14071, be sure
to use Version 2.1 or later of the ADC16061.EXE software
with the ADC14071 choice in the Configuration Menu.
3.0 Functional Description
Figure 7 shows the block diagram of the ADC14071
evaluation board, while
Figures 8 and 9 show the board
schematic. U4 is the ADC14071 under test.
2.0 Quick Start
3.1 Input signal conditioning.
1. Unless the ADC14071 Evaluation Board has been pre-
assembled, it needs to be assembled before
operation. Refer to
Figure 1 for the location of major
components on the board. Refer to section 8.0 for the
bill of materials.
The board contains a breadboard area to be used as
needed. The input signal to be digitized should be applied to
BNC connector J1. For sinusoidal input signals you should
include an appropriate bandpass filter in the input circuitry
because the signal from any generator will usually contain
more distortion than that produced by a 14-bit ADC. Without
the input filter, the measured performance will not be as
good as the ADC14071 capability.
2. Connect a cable with DB-25 connectors between
connector P1 on the board and an available parallel
port on your PC.
3. Position jumpers JP4 and JP5 to their default position
as indicated in
Figure 1. Position jumpers JP1, JP2
and JP3 opposite to their default positions.
Note that the input signal to the ADC14071 should not swing
below ground, or go above the ADC14071 analog supply,
VA, to avoid damage to the device. To avoid signal clipping
at the ADC output, the signal at the ADC input pins should
have a peak-to-peak value less than VREF, centered around
VREF/2.
4. Connect voltage sources (±12V to ±15V) and ground
to Power Connector P2 and turn on the power.
5. Press the RESET button (S1).
6. Adjust VR2 for 2.0V at TP1. This sets the ADC14071
reference voltage.
To get the correct differential 4VP-P centered at VREF/2 at
the ADC14071 input, the transformer requires a 2 VP-P
signal at J1, while the op-amp circuit requires a 1 VP-P
signal centered at 0V to be applied at J1.
7. Adjust VR1 (Balance) for equal dc voltages at TP12
and TP13 (near JP2 and JP3).
3.2 ADC reference circuitry.
8. Copy Version 1.1 or later of the WaveVision software
(ADC16061.EXE) to the desired computer hard drive
directory and
RUN
it.
The ADC14071 operates with a nominal reference voltage of
2.0V. The acceptable reference voltage range is
9. Connect a 50 Ohm signal generator to BNC J1 and
adjust its output for a signal excursion between the
limits of -0.5V and +0.5V. Be careful not to overdrive
the ADC14071 input.
1.0V
≤
VREF
≤
2.7V.
This board, if assembled, comes with a LM4041-ADJ
adjustable reference. The nominal range of adjustment in
this circuit is 1.3V to 2.8V.
10. To use the op-amp-based single ended to differential
conversion circuit, place jumpers JP1, JP2 and JP3
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