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Chapter 2
Using the Module
sync pulse before the start trigger can be correctly handled in time. Step 6 in the
section allows NI-DAQmx to handle this delay automatically. After the digital
start trigger, you cannot read data for the first sample in software until the digital filter group
delay has elapsed. Therefore, it takes a total of twice the digital filter group delay to start an
acquisition. You can insert additional time between when the sync pulse occurs and when the
start trigger occurs. This will not affect the time it takes before samples are available after the
start trigger, which is always the group delay time. Group delay time increases as sample rates
decrease. Refer to the
NI PXIe-4340 Device Specifications
document for details regarding the
group delay at different sample rates.
Synchronization
Some applications require tight synchronization between input and output operations on
multiple modules. Synchronization is important to minimize skew between channels and to
eliminate clock drift between modules in long-duration operations. You can synchronize the
analog input operations on two or more PXIe-4340 modules to extend the channel count for your
measurements. In addition, the PXIe-4340 can synchronize with other product families using
Reference Clock Synchronization.
Reference Clock Synchronization
With Reference Clock Synchronization, master and slave modules generate their ADC
oversample clock from the shared 100 MHz reference clock from the PXI Express backplane
(PXIe_CLK100). The backplane supplies an identical copy of this clock to each peripheral slot.
In addition, multiple chassis can be synchronized by using a timing and synchronization board
to lock the 100 MHz clock across chassis.
When you acquire data from multiple modules within the same NI-DAQmx task, NI-DAQmx
will automatically handle all of the Reference Clock Synchronization details required to
synchronize the modules within the task. This is known as a Multi-Device Task.
To perform Reference Clock Synchronization when using multiple NI-DAQmx tasks that are
acquiring at the same rate, complete the following steps to synchronize the hardware.
1.
Specify PXIe_CLK100 as the reference clock source for all modules to force all the
modules to lock to the reference clock on the PXI Express chassis.
2.
Choose an arbitrary PXIe-4340 master module to issue a sync pulse on one of the PXIe
Trigger lines. The sync pulse resets the ADCs and oversample clocks, phase aligning all the
clocks in the system to within nanoseconds.
3.
Configure the rest of the modules in your system to receive their sync pulse from the sync
pulse master module. This will ensure all ADCs are running in lockstep.
4.
Choose one module to be the start trigger master. This does not have to be the same module
you chose in step 2.
5.
Configure the rest of the modules in your system to receive their start trigger from the start
trigger master module. This ensures that all modules will begin returning data on the same
sample.
