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National Instruments Corporation
3-1
Getting Started with Your PCI/PXI-6810 SDA
Chapter
3
Hardware Overview
This chapter presents an overview of the hardware functions on your
6810 device and explains the operation of each functional unit.
Functional Overview
The 6810 device uses reconfigurable technology that allows the
instrument driver and soft front panel to alter the logical structure of the
hardware. When the 6810 device powers on, all 6810 output is disabled
except for the RS-232 transceivers, as required of RS-232 devices.
Further, the onboard clock circuitry is disabled. After you either run the
soft front panel or invoke an NI-SDA configuration function call from
within your application, all the 6810 device hardware will operate as
you specify.
Figure 3-1 shows the basic architecture of the 6810 device. The 6810
interfaces to the PCI bus with the National Instruments MITE ASIC.
The MITE ASIC incorporates DMA controllers that enable the MITE to
operate as a PCI bus master. The MITE can then move data rapidly and
efficiently to and from system memory. This efficiency precludes the
need for large data buffers on the device, but the 6810 does have some
onboard buffering to accommodate PCI bus latencies.
Another ASIC on the 6810, the DAQ DIO, formats data into two 16-bit
parallel data streams that then pass to the serial channels for conversion
to or from serial transmission.
A key feature of the hardware is the independence of each serial
channel. Each serial channel has its own dedicated serial hardware,
transceivers, 16-bit data path in the DAQ DIO, and DMA controller in
the MITE.
The block diagram in Figure 3-1 illustrates the key functional
components of the 6810 device.
