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Component-Level Intellectual Property (CLIP)

The LabVIEW FPGA Module includes component-level intellectual property (CLIP) for HDL

IP integration. FlexRIO devices support two types of CLIP: user-defined and socketed.

User-defined CLIP

 allows you to insert HDL IP into an FPGA target, enabling VHDL

code to communicate directly with an FPGA VI.

Socketed CLIP

 provides the same IP integration of the user-defined CLIP, but it also

allows the CLIP to communicate directly with circuitry external to the FPGA. Adapter

module socketed CLIP allows your IP to communicate directly with both the FPGA VI

and the external adapter module connector interface.

The FlexRIO adapter module ships with socketed CLIP items that add module I/O to the

LabVIEW project.

NI 5752/5752B CLIP

The NI 5752/5752B ships with the following CLIP items:
1. NI 5752 IO Module—This CLIP provides access to thirty-two analog input channels,

sixteen digital output lines, and two digital input lines. This CLIP also contains a SPI
interface to program the ADC registers. In the NI 5752/5752B IO Module CLIP, each
Sample Clock cycle generates a sample from the analog input channels. The following
clock sources are available and are selectable using the 

SampleClkSrcSelect

 control.

50 MHz onboard oscillator

DStarA through IOModSyncClock

External clock through the front panel SMB connector

Only external sample clock rates from 25 MHz to 50 MHz are supported with this CLIP.
Each 12-bit sample is output to LabVIEW as an I16 data type. The 12-bit data is left-
justified and padded with 4 zeros in the LSBs. The data is clocked out of the CLIP on
Data Clock.

2. NI 5752 Multidevice Synchronization—This CLIP provides access to thirty-two analog

input channels, sixteen digital output lines and two digital input lines. This CLIP also
contains a SPI interface to program the ADC registers. For applications requiring
synchronization across multiple NI 5752/5752B modules, this CLIP is recommended. For
more details on multidevice synchronization, refer to KnowledgeBase 

5AN9QBLY

 at 

ni.com/support

.

In the NI 5752/5752B Multidevice Synchronization CLIP, each Sample Clock cycle
generates a sample from the analog input channels. DStarA is the only Sample Clock that
is routed. Only Sample Clock rates from 25 MHz to 50 MHz are supported with this
CLIP. Each 12-bit sample is output to LabVIEW as an I16 data type. The 12-bit data is

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ni.com

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NI 5752/5752B Getting Started Guide

Содержание NI-5752B

Страница 1: ...NI 5752B...

Страница 2: ...d controllers for FlexRIO The NI 5752 variant is compatible with the NI PXI 795xR and NI PXIe 796xR FPGA modules only Note NI 5752R refers to the combination of your NI 5752 5752B adapter module and e...

Страница 3: ...rules Caution To ensure the specified EMC performance operate this product only with shielded cables and accessories Caution To ensure the specified EMC performance you must install PXI EMC Filler Pan...

Страница 4: ...nformation about LabVIEW features on real time operating systems FlexRIO Help Available from the Start menu and at ni com manuals Contains information about the FPGA module front panel connectors and...

Страница 5: ...NI 5752B variant is compatible with all FlexRIO FPGA modules and controllers for FlexRIO however the NI 5752 variant is only compatible with NI PXI 795xR and NI PXIe 796xR modules The following table...

Страница 6: ...ble Assemblies Unpacking Caution To prevent ESD from damaging the devices ground yourself using a grounding strap or by holding a grounded object such as your computer chassis 1 Touch the antistatic p...

Страница 7: ...i com manuals for complete specifications Caution Clean the hardware with a soft nonmetallic brush Make sure that the hardware is completely dry and free from contaminants before returning it to servi...

Страница 8: ...f installed devices Installed devices appear under the name of their associated chassis 3 PXI and PXI Express devices only Expand your Chassis tree item MAX lists all devices installed in the chassis...

Страница 9: ...signals connected to the NI 5752 5752B before powering down the module and connect signals only after the adapter module has been powered on by the FlexRIO FPGA module or controller for FlexRIO Cauti...

Страница 10: ...AI GND AI GND AI GND AI GND RSVD RSVD RSVD RSVD RSVD RSVD AI GND AI GND AI GND AI GND AI 31 AI GND AI 29 AI GND AI 31 AI GND AI 27 AI 29 AI GND AI 25 AI 27 AI GND AI 23 AI 25 AI GND AI 21 AI 21 AI GND...

Страница 11: ...D GND DO 0 DO 2 DO 4 DO 6 DO 8 DO 10 DO 12 DO 14 DO 1 DO 3 DO 5 DO 7 DO 9 DO 11 DO 13 DO 15 D GND D GND D GND D GND D GND D GND D GND D GND D GND D GND D GND D GND D GND D GND D GND D GND D GND D GND...

Страница 12: ...CLIP Clock Multiplexer Deserializer Deserializer Deserializer Deserializer Data Clock DI 0 DI 1 DO 0 AdcTgcStart AdcRegisterReset SampleClkSrcSelect Sync Clock DSTARA 50 MHz Internal Oscillator ADC A...

Страница 13: ...the analog input channels The following clock sources are available and are selectable using the SampleClkSrcSelect control 50 MHz onboard oscillator DStarA through IOModSyncClock External clock thro...

Страница 14: ...dules such as the NI PXIe 796xR DStarA is not available on NI 793xR controllers for FlexRIO or NI PXI FlexRIO FPGA modules such as the NI PXI 795xR On PXI Express modules Sync Clock is driven by the D...

Страница 15: ...If your product supports calibration you can obtain the calibration certificate for your product at ni com calibration NI corporate headquarters is located at 11500 North Mopac Expressway Austin Texa...

Страница 16: ...tem is also installed with the driver software Support ni com support FlexRIO ni com flexrio Services ni com services Located at ni com manuals Located at ni com gettingstarted Available from the Star...

Страница 17: ...party legal notices in the readme file for your NI product Refer to the Export Compliance Information at ni com legal export compliance for the NI global trade compliance policy and how to obtain rel...

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