©
National Instruments Corporation
I-1
Index
A
analog filter correction, 2-12
analog output, 2-7 to 2-10
analog output and SYNC out block
diagram, 2-8
output attenuation, 2-9 to 2-10
output enable, 2-10
output impedance, 2-10
specifications, A-1
SYNC output and duty cycle, 2-9
waveform and trigger timings (figure), 2-8
ARB connector, 1-4
attenuation of output, 2-9 to 2-10
B
block diagram for NI 5401, 2-1
bus interface specifications, A-3
C
cables, optional, B-1 to B-2
calibration, 2-15
clocks
external clock reference input, A-4
internal clock, A-4
ComponentWorks software, 1-11
connectors.
See
I/O connectors.
continuous trigger mode, 2-6
conventions used in manual,
vi
customer education, D-1
D
DDS.
See
direct digital synthesis (DDS).
DGND signal (table), 1-7
digital connector signal descriptions (table), 1-7
digital trigger specifications, A-3
direct digital synthesis (DDS)
building blocks for DDS (figure), 2-3
description, 2-3 to 2-4
frequency hopping and sweeping, 2-4
frequency resolution and lookup
memory, C-1 to C-2
single waveform output from DDS
memory, 1-9
duty cycle of SYNC output, 2-9
E
electromagnetic compatibility
specifications, A-5
external clock reference input, A-4
EXT_TRIG signal (table), 1-7
F
filters
analog filter correction, 2-12
characteristics, A-2
frequency
direct digital synthesis, 2-4
frequency hops and sweeps, 2-4
frequency resolution and lookup
memory, C-1 to C-2
function generator operation
analog filter correction, 2-12 to 2-13
analog output, 2-7 to 2-10
output attenuation, 2-9 to 2-10
output enable, 2-10
output impedance, 2-10
SYNC output and duty cycle, 2-9
block diagram, 2-1
calibration, 2-15
direct digital synthesis (DDS), 2-3 to 2-4