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Index
I-2
ni.com
pre-calibration errors, A-3
self-calibration, 5-12
specifications, A-3
CE compliance specifications, A-6
channel properties, configuring
in application development (table), 5-4
in LabVIEW, 5-7
DAQ timing connections
PXI trigger bus
common questions, D-1
common-mode rejection (CMR), effective, 4-5
common-mode rejection ratio (CMRR), 4-4
configuring
channel properties
NI PXI-4224
See
signal connections
conventions used in the manual,
D
DAQ Assistant, 5-3
DAQ timing connections
AI CONV CLK signal
input signal timing (figure), B-7
output signal timing (figure), B-8
overview, B-7
signal routing (figure), 4-6
AI HOLD COMPLETE signal
description (table), 4-9
overview, B-10
signal timing (figure), B-10
AI PAUSE TRIG signal
description (table), 4-9
overview, B-8
AI REF TRIG signal
input signal timing (figure), B-4
output signal timing (figure), B-5
overview, B-4
AI SAMP CLK signal
input signal timing (figure), B-6
output signal timing (figure), B-6
overview, B-5
AI SAMPLE CLK TIMEBASE signal
description (table), 4-9
overview, B-9
signal timing (figure), B-9
AI START TRIG signal
description (table), 4-9
input signal timing (figure), B-3
output signal timing (figure), B-3
overview, B-3
typical pretriggered acquisition
DAQmx Channel Property Node, using in
See
application
development
device and PXI clocks, 4-7
digital trigger specifications, A-3
documentation
application development, 5-11
conventions used in the manual,
National Instruments documentation, 1-3
E
effective CMR, 4-5
electromagnetic compatibility
environmental specifications, A-5
external calibration, 5-13, D-2