©
National Instruments Corporation
I-1
Index
A
acquisition and region-of-interest (ROI)
acquisition start conditions, 3-4
acquisition window control
active pixel region (acquisition
interlaced video, 3-5
region of interest, 3-5
application software, Vision Development
B
block diagram of IMAQ PCI-1424, 3-2
C
calibration certificate (NI resources), B-2
clock signals, Pixel Clock± signal (table), 4-3
clocks, specifications, A-2
Control<3..0>± signal (table), 4-3
conventions used in the manual,
D
data formatter, multiple-tap, 3-3
Data<31..0>± signal (table), 4-3
DCD signal (table), 4-3
Declaration of Conformity (NI resources), B-1
delayed acquisition start conditions, 3-5
diagnostic tools (NI resources), B-1
DMA controllers, 3-4
documentation
conventions used in the manual,
drivers (NI resources), B-1
DSR signal (table), 4-3
DTR signal (table), 4-3
E
Enable<D..A>± signal (table), 4-3
environment specifications, A-3
equipment, optional, 2-2
examples (NI resources), B-1
external connection specifications, A-1
External Trigger<3..0>± signal (table), 4-3
F
G
H
hardware overview
acquisition and ROI, 3-4
acquisition window control, 3-5
block diagram, 3-2
board configuration NVRAM, 3-4
high-speed timing, 3-4
LUTs, 3-2
multiple-tap data formatter, 3-3
RS-232 serial interface, 3-3
scatter-gather DMA controllers, 3-4
SDRAM, 3-3
start conditions, 3-4
trigger control and mapping circuitry, 3-3
help, technical support, B-1
high-speed timing circuitry, 3-4