National Instruments GPIB-VXI/C, Руководство пользователя

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Chapter 2 Configuration and Startup Procedures
© National Instruments Corporation 2-5 GPIB-VXI/C User Manual
Table 2-3 shows the relationship between the amount of installed memory,
the local address range occupied by the memory, and the range of VXI A24
addresses accessible by the GPIB-VXI/C as a bus master.
Setting the Shared Memory Size
You can set the amount of memory that is shared with the VXIbus by
altering the settings of switches S1 and S2. Table 2-4 gives the S1 and S2
switch settings for sharing various portions of RAM with the VXIbus for
each possible installed memory configuration.
Note The RAM shared with the VXIbus will be the upper portion of the installed memory.
The GPIB-VXI/C Offset Register holds the shared memory VXI A24 base
address, as described in the VXIbus specification. The RM automatically
configures the Offset Register at startup.
Table 2-3. GPIB-VXI/C CPU Local and A24 Memory Ranges
Installed
Memory Size
Installed Memory
Local Address Range
Accessible VXI A24
Address Range
Start End Start End
512 KB 000000h 07FFFFh 080000h E7FFFFh
1 MB 000000h 0FFFFFh 100000h E7FFFFh
2 MB 000000h 1FFFFFh 200000h E7FFFFh
4 MB 000000h 3FFFFFh 400000h E7FFFFh
Table 2-4. Shared Memory Switch Settings
Configured
Memory Size
Amount of Installed Memory Shared with VXIbus
S1 ON
S2 ON S1 OFF
S2 ON
S1 ON
S2 OFF
S1 OF
S2 OFF
512 KB 512 KB 256 KB 128 KB none
1 MB 1 MB 512 KB 256 KB none
2 MB 2 MB 1 KB 512 KB none
4 MB 4 MB 2 MB 1 MB none