Chapter 7
PFI
©
National Instruments Corporation
7-3
•
AO Sample Clock Timebase (ao/SampleClockTimebase)
•
AO Pa
u
se Trigger (ao/Pa
u
seTrigger)
•
Co
u
nter inp
u
t signals for either co
u
nter—So
u
rce, Gate, A
u
x,
HW_Arm, A, B, Z
Most f
u
nctions allow yo
u
to config
u
re the polarity of PFI inp
u
ts and
whether the inp
u
t is edge or level sensitive.
Exporting Timing Output Signals Using PFI Terminals
Yo
u
can ro
u
te any of the following timing signals to any PFI o
u
tp
u
t
terminal:
•
AI Convert Clock
*
(ai/ConvertClock)
•
AI Hold Complete Event (ai/HoldCompleteEvent)
•
AI Reference Trigger (ai/ReferenceTrigger)
•
AI Sample Clock (ai/SampleClock)
•
AI Start Trigger (ai/StartTrigger)
•
AO Sample Clock
*
(ao/SampleClock)
•
AO Start Trigger (ao/StartTrigger)
•
Co
u
nter
n
So
u
rce
•
Co
u
nter
n
Gate
•
Co
u
nter
n
Internal O
u
tp
u
t
•
Freq
u
ency O
u
tp
u
t
Note
Signals with a * are inverted before being driven to a terminal; that is, these signals
are active low.
Using PFI Terminals as Static Digital I/Os
Each inp
u
t PFI line can be individ
u
ally config
u
red as a static digital inp
u
t,
called P0.
x
. Each o
u
tp
u
t PFI line can be individ
u
ally config
u
red as a static
digital o
u
tp
u
t, called P1.
x
.
1
1
On USB-6212/6216 devices, all PFI lines can be individ
u
ally config
u
red as static digital inp
u
ts or static digital o
u
tp
u
ts, called
P0.
x
.
